MIPI CSI DSI C-PHY IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
D&R Industry Articles
Articles for the Week of September 2, 2024
An Introduction to Direct RF Sampling in a World Evolving Towards Chiplets - Part 1
This paper focuses on how direct RF sampling architecture has proved to be a felicitous approach for RF data conversion. The progress in converter technology has made it possible to increase the sampling rates and support very large bandwidth and multiple operating RF bands.- Proven solutions for converting a chip specification into RTL and UVM
- Revolutionizing Chip Design with AI-Driven EDA
- Optimizing Automated Test Equipment for Quality and Complexity
Articles for the Week of August 26, 2024
How to cost-efficiently add Ethernet switching to industrial devices
This post explores critical considerations and solutions for implementing Ethernet switches tailored to industrial applications, emphasizing required features and cost-effectiveness.Articles for the Week of August 19, 2024
Why Interlaken is a great choice for architecting chip to chip communications in AI chips
The Interlaken protocol is an advanced interconnect technology that effectively addresses the architecture and design requirements of AI chips. It provides high bandwidth through multi-gigabit-per-second lanes, facilitating the handling of large data volumes and sustaining high computational throughput.Articles for the Week of August 12, 2024
Key considerations and challenges when choosing LDOs
The vast array of on-chip LDO options and characteristics can make the selection process complex.Articles for the Week of August 5, 2024
BCD Technology: A Unified Approach to Analog, Digital, and Power Design
Since its inception, BCD technology has leveraged the integration of two primary technologies—polysilicon gate CMOS and DMOS power architecture—on the same chip. Its compatibility with bipolar components has enabled the creation of SoCs (System-on-Chip) that combine digital and analog control with efficient power management sections.- Why Transceiver-Rich FPGAs Are Suitable for Vehicle Infotainment System Designs
- NoCs and the transition to multi-die systems using chiplets
Articles for the Week of July 29, 2024
How to Turbo Charge Your SoC's CPU(s)
It’s no surprise that the creators of system-on-chip (SoC) devices wish to squeeze the maximum performance out of their systems. One way to do this is to use the highest-performing intellectual property (IP) cores available, including Central Processing Unit (CPU) cores.Articles for the Week of July 22, 2024
Rising respins and need for re-evaluation of chip design strategies
As a result of design complexity and market competition, innovative chip development strategies have become essential for expedited market entry and revenue growth. Tapping into these technological advances is a strategic imperative to secure market leadership.- Simplifying analog and mixed-signal design integration
- AI-driven SRAM demand needs integrated repair and security
Articles for the Week of July 8, 2024
Select the Right Microcontroller IP for Your High-Integrity SoCs
There may be a seemingly unlimited array of microcontrollers for consideration, but how do you select the right one when developing high-integrity SoCs that meet all functional-safety requirements?Articles for the Week of July 1, 2024
Optimal OTP for Advanced Node and Emerging Applications
While leading foundries keep pushing Moore’s law to the limit of physics, embedded non-volatile memory (eNVM) is becoming a game-changer in designing advanced integrated chips.Articles for the Week of June 17, 2024
Creating SoC Designs Better and Faster With Integration Automation
A modern high-end system-on-chip (SoC) design can be extremely large and enormously complex, employing thousands of intellectual property (IP) blocks. Most of these IPs will be sourced from trusted third-party vendors. These will typically be augmented by one or more internally-developed IPs to provide the secret sauce that will distinguish this SoC from its competitors.Articles for the Week of June 10, 2024
System-on-chip (SoC) design is all about IP management
For most system-on-chip (SoC) designs, the most critical task is not RTL coding or even creating the chip architecture. Today, SoCs are designed primarily by assembling various silicon intellectual property (IP) blocks from multiple vendors. This makes managing silicon IP the dominant task in the design process.- Shift Left for More Efficient Block Design and Chip Integration
- Certifying RISC-V: Industry Moves to Achieve RISC-V Core Quality
- Speeding Derivative SoC Designs With Networks-on-Chips