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intoPIX and Media Links: Powering Next-Generation IP Media Transport with JPEG XS at InterBEE ...
intoPIX is excited to announce that its advanced JPEG XS technology, TicoXS, is now integrated into the Media Links Xscend platform, an IP Media Platform ... Read
After its first certification, Imagination is planning to submit all Imagination DXS GPU configurations for independent certification over the coming ... Read
Embdded FPGA and AI IP company Flex Logix has been acquired by Analog Devices. The 10-year-old company’s technology assets and technical team will transfer ... Read
Partner Highlight
Oriole Networks Selects EnSilica as ASIC Partner and Contract Award for Photonics Controller ...
EnSilica is pleased to announce that it has been selected by Oriole Networks, a developer of artificial intelligence (“AI”) optimisation technology, ... Read
Panasonic Automotive Systems and Arm Partner to Standardize Software-Defined Vehicles
Panasonic Automotive Systems Co., Ltd. (PAS) and Arm today announced a strategic partnership aimed at standardizing automotive architecture for Software-Defined ... Read
Ceva, Inc. (NASDAQ: CEVA), the leading licensor of silicon and software IP that enables Smart Edge devices to connect, sense and infer data more reliably ... Read
Industry Expert Blogs
Synopsys Blog Dana Neustadter, Sara Zafar Jafarzadeh, Vincent van der Leest (Synopsys)
Cadence Blog Arif Khan (Cadence) in collaboration with Gautam Singampalli (Cadence)
Synopsys Blog Daryl Seitzer, Rahul Thukral (Synopsys)
Synopsys Blog Frank Schirrmeister, Synopsys
40G UCIe PHY IP on Samsung SF4X
Flip-Chip compatible I/O Library in Dongbu HiTek 130nm with ...
Highly Accurate RC Oscillator on SMIC 180nm
DDR5 Temperature Sensor I3C / I2C
UniPro 1.6 Host/Device IP
60MHz Differential Line Driver - X-FAB 0.35um
PCI Express Controller
PCIe 4.0 PHY on 5nm
PCIe 6.2 Switch
32 bit RISC-V Multicore Processor with 256-bit VLEN and AMM
WDT Verification IP
Simulation VIP for AMBA LTI
UCIe Verification IP
BoW Verification IP
Pre-verified Interface IP Subsystems reduce design risk and ...
Industry Articles
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Last-Time Buy Notifications For Your ASICs? How To Make the Most of It
Enrique Martinez
EnSilica -
CANsec: Security for the Third Generation of the CAN Bus
CAST and Fraunhofer IPMS
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Accelerating SoC Evolution With NoC Innovations Using NoC Tiling for AI and Machine Learning
Andy Nightingale
Arteris -
A new era for embedded memory
Eran Briman
Weebit Nano -
Electronic musical instruments design: what's inside counts
Kevin Kai-Wen Liu
Faraday Technology -
Casting a wide safety net through post processing Checking
Purushottham R
HCL Technologies -
Proven solutions for converting a chip specification into RTL and UVM
Nikita Gulliya
Agnisys -
Revolutionizing Chip Design with AI-Driven EDA
Thomas Andersen
Synopsys
