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Silicon IP Provider, Chips&Media Unveils New Multi Video Codec IP, WAVE6 Gen2+

GlobalFoundries and NXP to Deliver Next-Generation 22FDX Solutions for Automotive, IoT and Smart Mobile
Celestial AI Acquires Rockley Photonics Patent Portfolio, Strengthening Photonic Fabric IP
M31 Once Again Ranked Among Forbes' "Asia 200 Best Under a Billion" List
DeepComputing and Andes Technology Partner to Develop the World's First RISC-V AI PC with 7nm QiLai SoC, Featuring Ubuntu Desktop
Andes Technology Unveils the D45-SE RISC-V Processor Targeting ASIL-D Certification
Fractile Licenses Andes Technology's RISC-V Vector Processor as It Builds Radical New Chip to Accelerate AI Inference

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			IP / SoC
			
			Andes Technology Unveils the D45-SE RISC-V Processor Targeting ASIL-D Certification
			
Andes Technology   proudly announces the launch of its industry-leading functional safety RISC-V processor AndesCore™ D45-SE, targeting ISO 26262 ASIL-D ...
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			IP / SoC
			
			VeriSilicon's DeWarp Processing IP DW200-FS achieved ISO 26262 ASIL B certification
			
VeriSilicon (688521.SH) today announced that its DeWarp Processing IP DW200-FS has achieved ISO 26262 ASIL B automotive functional safety certification. ...
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			IP / SoC
			
			Logic Design Solutions launches an EXFAT IP Soft Core for NVMe Host
			
Logic Design Solutions launches its EXFAT IP Soft Core after the FAT32 IP Soft Core, one month ago.
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			IP / SoC
			
			Arteris and SiFive Deliver Pre-verified Solution for the Datacenter Market
			
The collaboration enables SoC designers to reduce project risk and integrate Arteris Ncore cache coherent interconnect IP and SiFive P870-D processors ...
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			IP / SoC
			
			Andes Announces the AndesCore™ AX66 supporting RVA23, Multi-cluster, Hypervisor and Android ...
			
Andes Technology today announces the AndesCore™ AX66 out-of-order superscalar multicore processor IP supporting the RVA23 profile.
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			Deals
			
			EnSilica plc - Award of £2 million Controller ASIC Design Services Contract
			
EnSilica is pleased to announce that it has been awarded an ASIC design services contract with a prestigious supplier of power and propulsion systems ...
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Industry Expert Blogs

Advancing Die-to-Die Connectivity: The Next-Generation UCIe IP Subsystem

Delivering a Better Support Experience for IP Customers

Cadence Blog
Mayank Bhatnagar, Cadence

CAST Blog
Meredith Lucky, VP of Sales & Support, CAST

Driving Innovation: Cadence's Cutting-Edge IP on TSMC's N3 Node

Cadence Commits to Join imec Automotive Chiplet Programme

Cadence Blog
Frank Ferro, Cadence

Cadence Blog
Cadence

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GUC HBM3 / UCIe IPs and 2.5D Total Service Package
Complete Service Scope: from IP, CoWoS/InFO design to production HBM3 up to 9.4G: N7, N5 and N3 silicon validated UCIe1.1 (32G/lane, 10Tbps/mm) : N3P & N5 design kits ready GLink 2.3LL (5Tbps/mm) : N5 and N3 silicon validated Visit GUC at tsmc Japan OIP (booth: 11)
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Seamlessly Integrated SRAM Repair Toolset: Siemens Tessent MemoryBIST with NeoFuse OTP
Optimized for High Density, Minimal Footprint, and Maximum Flexibility Low-power programming allows for in-field, incremental repair and simplifies layout and backend implementation, crucial for HPC, AI, and LLM SoCs Read News Read Article

Bluetooth® V6.0 Channel Sounding
Redefining Wireless Performance

BT & BLE RF Transceiver IP Silicon Proven in 22nm & 40nm
Enables High-Accuracy, low latency with great performance
Bluetooth LinkLayer Controller, SW Stack & Profiles
IP licensed for a leading Automotive SOC

Silicon Lifecycle Management PVT Monitor IP

Analyze monitor data for better power and performance optimization
Enable analytics to improve reliability and safety of the SoC
User configurable for specific applications: HPC Datacenters, AI, Automotive, IoT etc.

Industry Articles

A new era for embedded memory
Eran Briman
Weebit Nano
Electronic musical instruments design: what's inside counts
Kevin Kai-Wen Liu
Faraday Technology
Casting a wide safety net through post processing Checking
Purushottham R
HCL Technologies
Proven solutions for converting a chip specification into RTL and UVM
Nikita Gulliya
Agnisys
Revolutionizing Chip Design with AI-Driven EDA
Thomas Andersen
Synopsys
Optimizing Automated Test Equipment for Quality and Complexity
Jeorge Hurtarte
Teradyne
An Introduction to Direct RF Sampling in a World Evolving Towards Chiplets - Part 1
Niloufar Mosharafian
Analogue Insight
How to cost-efficiently add Ethernet switching to industrial devices
Comcores

Videos

Leverage Certified RISC-V IP to Craft ASIL ISO 26262 Grade Automotive Chips
Marvin Chao (Andes Technology), Chuck Brokish (GHS)

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Latest News

Silicon IP Provider, Chips&Media Unveils New Multi Video Codec IP, WAVE6 Gen2+

Today on Design-Reuse.com

Andes Technology Unveils the D45-SE RISC-V Processor Targeting ASIL-D Certification

VeriSilicon's DeWarp Processing IP DW200-FS achieved ISO 26262 ASIL B certification

Logic Design Solutions launches an EXFAT IP Soft Core for NVMe Host

Partner Highlight

Arteris and SiFive Deliver Pre-verified Solution for the Datacenter Market

Andes Announces the AndesCore™ AX66 supporting RVA23, Multi-cluster, Hypervisor and Android ...

EnSilica plc - Award of £2 million Controller ASIC Design Services Contract

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