Nitin Jain, MindTree Consulting
Feb 06, 2006 (5:00 AM), CommsDesign
An enormously high number of algorithms are in use today in various electronic systems. Integrating and evaluating a DSP algorithm with the system is tricky enough to bring programmers to their knees. To try to simplify this complex technology, let's first start with a relatively simple example.
Audio frequency spectrum that stretches to 40 kHz is divided in two bands. While the speech components are in the lower part of spectrum, from 5 Hz to 7 kHz, the audio components are in the remaining high portion (Fig. 1).
Speech processing mainly involves compression/decompression, recognition, conditioning and enhancement algorithms. Signal-processing algorithms count on system resources like available memory and clock. As these resources relate directly to system cost, they're often prohibitive.
Measuring an algorithm's complexity is the first step in analyzing the algorithm. This includes looking at the clocks required, and determining the algorithm's processing load, which can vary based on the processor employed. However, the memory requirements would not change based on the processor.
Most DSP algorithms work on collections of samples, better known as frames (Fig. 1). This introduces an inevitable delay due to frame collection that's in addition to the processing delay. Note that the International Telecommunication Union (ITU) standardizes the acceptable delay for an algorithm.
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