C-Language techniques for FPGA acceleration of embedded software
By David Pellerin (ImpulseC) and Kunal Shenoy (Xilinx)
Mar 31 2006 (14:19 PM), Courtesy of Programmable Logic DesignLine
Developers of embedded and high-performance systems are taking increased advantage of FPGAs for hardware-accelerated computing. FPGA computing platforms effectively bridge the gap between software programmable systems based on traditional microprocessors and systems based on custom hardware functions. Advances in design tools have made it easier to create hardware-accelerated applications directly from C language representations, but it is important to understand how to use these tools to the best advantage, and how decisions made during the design and programming of mixed hardware/software systems will impact overall performance.
This paper presents a brief overview of modern FPGA-based platforms and related software-to-hardware tools, then moves quickly into a set of examples showing how computationally-intensive algorithms can be written, analyzed and optimized for increased performance.
E-mail This Article | Printer-Friendly Page |
Related Articles
- Dealing with automotive software complexity with virtual prototyping - Part 3: Embedded software testing
- Using software verification techniques in non-safety critical embedded software designs
- Building a configurable embedded processor - From Impulse C to FPGA
- Optimizing embedded software for real-time multimedia processing
- Will Generative AI Help or Harm Embedded Software Developers?
New Articles
- Accelerating RISC-V development with Tessent UltraSight-V
- Automotive Ethernet Security Using MACsec
- What is JESD204C? A quick glance at the standard
- Optimizing Power Efficiency in SOC with PVT Sensor-Assisted DVFS Technology
- Bandgap Reference (BGR) Circuit Design and Transient Analysis in 90nm VLSI Technology
Most Popular
- Accelerating RISC-V development with Tessent UltraSight-V
- System Verilog Assertions Simplified
- Synthesis Methodology & Netlist Qualification
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)