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Unite algorithm and hardware design flows
Past attempts to bridge between the DSP design domain and physical implementations fell short, but the new "DSP synthesis" approach creates a truly integrated design flow.
By Chris Eddington, Senior Technical Marketing Manager, Synplicity
Jul 24 2006 (14:00 PM), Courtesy of DSP DesignLine
Many high-performance signal processing products are now being implemented in field-programmable gate arrays (FPGAs). FPGAs can offer an order of magnitude performance increase over standard DSP chips, making programmable logic a natural choice for high-performance DSP electronics.
There are typically two groups involved in the design and realization of DSP algorithms in an FPGA: DSP architects and hardware design engineers. Unfortunately, there is a "wall of abstraction" between the architects who formulate the algorithms and the design engineers who are charged with their physical implementation (Figure 1).
(Click this image to view a larger version)
1. A wall of abstraction separates DSP architects and hardware design engineers
This article reviews past attempts to build a bridge between the DSP design domain and physical implementations. Also discussed are the ways in which each of these conventional approaches falls short. Next, we introduce a new DSP design methodology—true DSP synthesis—which integrates into existing design flows without any disruption. This solution bridges the gap between the algorithmic and implementation domains by automating the processes of system-level optimization and implementation-level mapping.
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