NoC Silicon IP for RISC-V based chips supporting the TileLink protocol
Demystifying ESL for embedded systems designs
Mar 1 2007 (1:00 AM) -- Embedded Systems Design
While the definitions of ESL may vary, the end result should be the same, namely letting system developers analyze their designs at a higher level of abstraction.
A recent Google search on "electronic system level" yielded more than 86,900 results (and growing daily), quickly demonstrating how much information is available on this topic. But despite the abundance of buzz, it's not always easy to find a clearcut explanation of what this design method encompasses and how it applies to embedded systems design. From the broadest perspective, electronic system level (ESL) design consists of tools and methods that enable designers to describe and analyze ICs at a high level of abstraction.
This original definition was targeted at high-end chip designers. If you look at a concept introduced by Wired's Editor in Chief Chris Anderson called "the long tail," these high-end applications fit into the "head" as more high-volume and vertical applications.1 This concept is visualized in Figure 1.
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