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Polyphase Video Scaling in FPGAs
By Suhel Dhanani, Altera
September 06, 2007 -- dspdesignline.com
Video scaling is an increasingly common function used to convert images of one resolution and aspect ratio to another "target" resolution and/or aspect ratio. The most familiar example of video scaling is scaling a VGA signal (640 x 480) output from a standard laptop to an SXGA signal (1280 x 1024) for display on LCD monitors.
For high-volume systems dealing with standardized image sizes (i.e. high definition (HD) television), video scaling is most efficiently done using application specific standard products (ASSPs). However, many video applications such as video surveillance, broadcast display and monitoring, video conferencing, and specialty displays, need solutions that can handle custom image sizes and differing levels of quality. This often requires custom multi-tap polyphase scaling algorithms. FPGAs with an array of high-performance DSP structures are ideally suited for such algorithms, and FPGA vendors are beginning to offer user-customizable video scaling IP blocks that can be quickly configured for any application.
This article gives a basic overview of polyphase video scaling followed by a detailed description of how to implement polyphase scaling in an FPGA.
September 06, 2007 -- dspdesignline.com
Video scaling is an increasingly common function used to convert images of one resolution and aspect ratio to another "target" resolution and/or aspect ratio. The most familiar example of video scaling is scaling a VGA signal (640 x 480) output from a standard laptop to an SXGA signal (1280 x 1024) for display on LCD monitors.
For high-volume systems dealing with standardized image sizes (i.e. high definition (HD) television), video scaling is most efficiently done using application specific standard products (ASSPs). However, many video applications such as video surveillance, broadcast display and monitoring, video conferencing, and specialty displays, need solutions that can handle custom image sizes and differing levels of quality. This often requires custom multi-tap polyphase scaling algorithms. FPGAs with an array of high-performance DSP structures are ideally suited for such algorithms, and FPGA vendors are beginning to offer user-customizable video scaling IP blocks that can be quickly configured for any application.
This article gives a basic overview of polyphase video scaling followed by a detailed description of how to implement polyphase scaling in an FPGA.
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