Enhanced Capacitor Cross Coupled Front-End
Integrated Circuits Lab., Ain-Shams University
Cairo 11517, Egypt
Abstract
This paper presents two approaches to improve the performance of RF low noise amplifiers (LNAs) and downconversion mixers. One approach is for noise enhancement and the other is for improving flatness of very wide range LNA. The techniques described here are based mainly on making some enhancement on capacitive cross-coupled LNA technique. LNAs and mixers have been designed in 130nm CMOS process with 1.2V power supply. Enhanced noise figure LNA achieved a minimum noise figure of 2.2dB (taking into account the load thermal noise) with 2.4mW power consumption in LNA core only and a 4.5GHz bandwidth (1.5GHZ-6GHz). Enhanced wideband LNA achieved a constant noise figure of 4.3dB over the frequency range from 0.5GHz to 15GHz with 4.2mW power consumption in LNA core only. Moreover, these same two approaches were applied to mixer circuits by simply adding a switching stage after the LNA.
I. INTRODUCTION
Growth of the wireless communication market puts increasing demand on low power, low cost and high performance receivers. RF LNAs and mixers are among the most critical building blocks in the receiver chain. The CMOS technology has shown its feasibility for high frequency applications.
The conventional common-gate low-noise amplifier (CGLNA) exhibits a relatively high noise figure (NF) at low operating frequencies relative to the MOSFET unity gain frequency , which limited its adoption notwithstanding its superior linearity, input matching, and stability compared to the inductively degenerated common-source LNA (CSLNA). A lot of trials were made to enhance performance of common gate topology the most important of them is the noise cancellation technique [1] and capacitor cross coupled technique.
This paper describes how we can make small modification on a capacitive cross-coupling technique to improve noise figure or flatness of very wide range LNA. Section II discusses noise cancellation technique for improving NF.
Section III discusses capacitive cross-coupling LNA and how it overcomes the disadvantage of the initial noise cancellation technique. Section IV presents first modification that will help in improving NF. Section V present 2nd modification that help in improving flatness of very wide range LNA and, section VI will discuss how we can calibrate any LNA to be used as a mixer.
II. NOISE CANCELLATION TECHNIQUE
The noise cancellation technique is one of the most important techniques for decreasing noise. It depends on mixing common gate and common source topology with each other as shown in Fig(1), The interesting property of this circuit is that the fraction of M1 noise current that flows into R1 and Rs induces, by driving the gate of M2, an in-phase amplified noise current in R2, if the resulting noise voltages at the two output terminals are equal, then M1’s noise is common-mode and is nulled by differential sensing. With this in mind, let us calculate the LNA noise factor with respect to Rs. Assume matching input impedance. Then the LNA noise factor is given by:
The second and third term account for M1 and M2 noise, respectively, and the last term is due to load resistor noise. This expression shows that M1’s noise contribution is zero when
Disadvantages of this topology appears in two points, first due to process variation, there will be always difference between gm1 R1 & gm2 R2 and this will enlarge mismatch between IQ paths in receiver chain, so we need to try to compensate this effect on receiver backend, that will lead to complexity and will decrease receiver sensitivity.
Fig.1 Schematic of Noise Cancellation technique topology.
Second if we try to reconstruct our topology as shown in Fig(2) to eliminate the mismatch disadvantage (differential input – differential output), we will find from simulation results (Fig(3)), that its noise figure and power consumption will be higher than other topologies as we will see later. As a conclusion this topology is very useful only when we need single input to differential output stage.
Fig. 2. Schematic of differential input differential output noise cancellation LNA
III. CAPACITOR CROSS COUPLED TECHNIQUE
The capacitive cross-coupling can be considered as a modification of the previous noise cancellation technique topology as it depends on the same principle. In this section, we will demonstrate how this topology can be used to improve the NF of a common-gate input stage and how it tries to overcome the disadvantage of previous topology.
Fig.3. Noise Figure and S11 (input port reflection power) for noise cancellation LNA
Fig(4) shows the schematic of a differential common-gate input stage with cross coupled inputs. It can be shown that the cross-coupling causes the noise of M1 and M2, to produce common-mode noise voltages at the output node The derived noise factor expression of the input pair M1 and M2 (assuming that capacitors C1 and C2 are assumed to be much greater than gate-source capacitance Cgs) is given by:
Fig. 4. Schematic of ordinary capacitive cross coupled LNA
It can be seen that due to the capacitive cross-coupling the noise contribution from the input transistors is reduced though not completely eliminated. Worthy to mention is that the derivation of the noise factor assumes that the input impedance is matched to the source impedance for maximum power transfer. Also as in previous topology matching depends on parallel combination between common source and common gate, and by assuming that input of common source is only capacitive element, we can adjust matching by transconductance of common gate (gm1 Rs = 0.5). it is also interesting to note that the capacitive cross-coupling does not add much cost and complexity. From simulation results as shown in Fig(5 & 6), although minimum noise figure for this topology is 1+ / 2 that will be around (2.4dB for = 1.5 as in deep submicron case), we notice another 1dB degradation due to load thermal noise. If we want to decrease noise we must increase load impedance as in previous equation, yet if we tried to increase load resistance value, M1 and M2 will be on triode edge. So we can not increase load impedance beyond a certain value. Another disadvantage of this topology is the fact that some standards need a larger flat band, (variation in gain and noise over all the band must be minimum as possible), which cannot be controlled in this topology.
Fig. 5. Noise Figure and S11 (input port reflection power) for cross coupled LNA
Fig. 6. . Voltage gain for cross coupled LNA
IV. IMPROVING NOISE CROSS COUPLE TECHNIQUE
This topology mainly is useful in increasing load impedance, that leads to increasing gain and decreasing noise figure.
The first idea is to add two PMOS parallel to loads as shown if Fig(7), such that current passing in the loads will be a subtraction of PMOS current from NMOS current and so decreasing the current that passes through the resistance. This means that we can increase the resistance value to get the same operating voltage at output node as in previous topology.
Fig. 7. Schematic of noise enhancement capacitive cross coupled LNA
As shown from simulation results Fig(8 & 9), we can note that the the decrease in noise figure is not noticeable as the PMOS stage adds a new source of noise. To decrease this new source another modification can be made on topology by cross coupling the PMOS stage as shown in Fig(10)
Fig. 8. Noise Figure and S11 for enhanced cross coupled LNA
Fig. 9. Voltage gain for enhanced cross coupled LNA
Fig. 10 Schematic of noise enhancement capacitive cross coupled LNA
As shown from simulation result Fig(11&12) that we have wide band range (1.5GHz to 6GHz) with a very small noise figure (minimum 2.2dB 2.8dB at edges). One of the most disadvantage of this topology, is the increase of loads value leading to a decrease in the dominant pole, so there will be a huge difference between maximum and minimum gain of LNA in the specified operation range. For application that need flat band LNA, we cannot use this topology except for bandwidth less than 2 GHz.
From another point of view, maximum gain at 1.6GHz is 20dB and minimum Gain at 6GHz is 10 dB, which can be compensated by letting the mixer variable gain also in reverse to LNA (maximum gain at 6GHz and minimum at 1.6 GHz), for sure we cannot compensate all 10dB difference, but with PGA (programmable gain amplifier) just before analog to digital converter or before base band (depend on system) we will be able to compensate this difference completely, so we can benefit from wide-band low-noise high-gain front-end topology but with system compensation technique.
Fig. 11 Noise Figure and S11 for enhanced cross coupled LNA
Fig. 12 . Voltage gain for enhanced cross coupled LNA
V. IMPROVING FLATNESS OF VERY WIDE BAND LNA
In some applications it is desirable to let the entire needed band be flat (equal gain and noise), ordinary topologies do not satisfy this standard requirements. In Next topology we will add an bank of capacitors at input of cross coupled LNA. The number of this capacitors depend on frequency range needed and on maximum variation value needed. Fig(13) shows the circuit configuration of this topology, we can note that adding capacitor at input will lead to decrease in the unity gain frequency, that will lead to an increase in noise figure of the LNA. From simulation results Fig(14 & 15), we can note that, by using four parallel capacitors at input, the noise figure and gain from 0.5GHz to 15GHz is very flat.
Fig.13. Schematic of a very wide capacitive cross coupled LNA
VI. MIXER CALIBRATION
This section presents how any of the previous topologies of LNA can be calibrated as a Mixer. We can get from each topology its advantage towards noise figure. Actually any mixer can be considered as LNA followed by switcher, this switcher converts frequency of operation upward or downward, as example for calibrating the enhanced noise figure LNA as a mixer, we will add four switchs before load resistance as shown in Fig(16).
Fig. 14 . Noise Figure and S11 for enhanced cross coupled LNA
Fig.15 Voltage gain for enhanced cross coupled LNA
We know that for completely integrated chip, Mixer need not to be matched to 50, but for discrete component it must have matching input network, by adjusting inductor value at input we can get a variety if input resistance values at the needed operating frequency, so we can achieve requirements for both discrete or integrated levels.
VII. CONCLUSION
LNA and Mixer are of the most important blocks in receiver path, each topology of them has its own disadvantage and advantage. For single-input differential-output stage we will prefer to use noise cancellation technique, for low noise with wide band and moderate gain we will prefer to use cross coupled technique, for very low noise standards we will prefer to use noise enhanced cross coupled technique (cross coupled NMOS and PMOS) and for very flat wide band requirements we will prefer to use wide band cross coupled technique (with capacitor bank at input).
Next table summarizes some of the comparison points between different types of LNAs.
TABLE I COMPARISON BETWEEN DIFFERENT LNA TYPES
| bandwidth | NF | Power |
Noise Cancellation | 920MHz-6.3GHz | 3.6dB | 6mW |
CCCLNA | 900MHz-10GHz | 3.4dB | 2.64mW |
Noise Enhanced | 1.5GHz-6GHz | 2.2dB | 2.4mW |
Wide LNA | 500MHz-15GHz | 4dB | 4.2mW |
Fig. 16. Schematic of noise enhancement capacitive cross coupled LNA calibrated as Mixer
REFERENCES
[1] Eisse Mensink, Eric A. M. Klumperink and Bram Nauta,” Distortion Cancellation by Polyphase Multipath Circuits,” IEEE Transactions on Circuits and systems—I: regular papers, vol. 52, no. 9, September 2005
[2] Wei Zhuo, Sherif Embabi, José Pineda de Gyvez, Edgar Sánchez-Sinencio,” Using Capacitive Cross-Coupling Technique in RF Low Noise Amplifiers and Down-Conversion Mixer Design”
[3] W. Zhuo, X. Li, S. Shekhar, S. H. K. Embabi, J. Pineda de Gyvez, D. J. Allstot, and E. Sanchez-Sinencio,” A Capacitor Cross-Coupled Common- Gate Low-Noise Amplifier,” IEEE Transactions on Circuits and Systems—II: express briefs, vol. 52, no. 12, December 2005
[4] Ahmed Amer,” Design and implementation of a wideband receiver for wireless communications ,” M.S. dissertation, Ain Shams University, Cairo, Egypt, July 2006.
[5] Aly Ismail and Asad A. Abidi,” A 3–10-GHz Low-Noise Amplifier With Wideband LC-Ladder Matching Network,” IEEE Journal of Solid-state circuits, vol. 39, no. 12, December 2004
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[8] Hooman Darabi and Asad A. Abidi,” A 4.5-mW 900-MHz CMOS Receiver for Wireless Paging,” IEEE Journal of Solid-state circuits, vol. 35, no. 8, August 2000
[9] Chao-Shiun Wang, Wei-Chang Li, and Chorng-Kuang Wang,” A multiband multi-standard RF frontend for IEEE 802.16a and IEEE 802.11a/b/g applications”
[10] Xiaoyong Li, Sudip Shekhar and David J. Allstot,” Gm-Boosted Common-Gate LNA and Differential Colpitts VCO/QVCO in 0.18-um CMOS ,” IEEE Journal of Solid-state circuits, vol. 40, no. 12, December 2005
[11] S. Chehrazi, A. Mirzaei, R. Bagheri and A. A. Abidi,” A 6.5 GHz Wideband CMOS Low Noise Amplifier for Multi-Band Use,” IEEE 2005 CUSTOM INTEGRATED CIRCUITS CONFERENCE
[12] Derek K. Shaeffer and Thomas H. Lee,” A 1.5-V, 1.5-GHz CMOS Low Noise Amplifier,” IEEE Journal of Solid-state circuits, vol. 32, no. 5, May 1997
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