Using FPGAs to avoid microprocessor obsolescence
March 05, 2008 -- pldesignline.com
One way that silicon suppliers reduce manufacturing costs is by discontinuing older product portfolios leading to microprocessor obsolescence. Multiple versions of those processor cores and a mix of integrated peripherals complicate the situation, leading to a plethora of silicon incarnations for each particular processor architecture.
By integrating peripherals into a single die with a microprocessor, the supplier could target the microcontroller to a particular application domain with high volume needs. (Throughout this article, the term "microcontroller" refers to the entire component, including the processor core and integrated peripherals.)
As applications and the standards by which they operate evolve over time, the narrower market space of the microcontroller design makes it more vulnerable to obsolescence. This article examines the options that are available to designers facing microprocessor (and microcontroller) obsolescence using FPGAs.
Before considering those options, however, it is helpful first to consider FPGA technology as a means to address the challenge of microprocessor obsolescence. On a LatticeXP2 FPGA, for example, the CPU core of a 68HC11 compatible can be implemented as fully synthesizable code in just 2600 slices.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
|
Digital Core Design Hot IP
Related Articles
- Why Transceiver-Rich FPGAs Are Suitable for Vehicle Infotainment System Designs
- How to Avoid Fall in Expectations for Automated Driving
- Selection of FPGAs and GPUs for AI Based Applications
- Where automotive FPGAs stand in smart car designs
- Capitalizing on the Architectural Flexibility of FPGAs with RISC-V and a Simplified Programming Flow
New Articles
- Why RISC-V is a viable option for safety-critical applications
- Dimensioning in 3D space: Object Volumetric Measurement by Leveraging Depth Camera-based Reconstruction on NVIDIA Edge devices
- What is JESD204B? Quick summary of the standard
- Post-Quantum Cryptography - Securing Semiconductors in a Post-Quantum World
- Analysis and Summary on Clock Generator Circuits and PLL Design
Most Popular
- System Verilog Assertions Simplified
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Method for Booting ARM Based Multi-Core SoCs
- An Outline of the Semiconductor Chip Design Flow