Lower voltage next goal for low-power DDR

Marc Greenberg, Denali Software
EE Times (06/09/2008 12:00 AM EDT)

Low-power DDR2 (LPDDR2), a next-generation low-power memory technology for mobile and embedded designs that's being defined by companies participating in Jedec standards, offers higher speed, lower- voltage operation, larger capacities and lower pin count than the current generation--and lets nonvolatile memory share the same bus as SDRAM.

Whether you just call them mobile memories or use the formal Jedec naming system, low-power memories can be found today in all kinds of battery-operated and embedded applications. Such memories differ from those commonly used in desktop computers, laptops and servers (collectively, "PC memory"), such as DDR1, DDR2 and DDR3.

The current-generation low-power SDRAM (LPDDR1), available since 2003, still uses relatively high-voltage (1.8-V) I/Os and is limited to low speed (200 MHz). While the PC memory market has been shipping current-generation DDR3 parts in volume for more than a year, LPDDR1 memories have far more in common with two- generation-old DDR1 PC memory, sharing similar densities and operational modes.

While the target application for LPDDR1 memory in 2003 was often 2.5G mobile phones, today LPDDR1 devices are being used in other portable computing applications, such as global positioning systems, personal media players and the latest-generation 3G data-connected phones.

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