How to select CPLDs for handheld applications

By Shantanu Dhavale, Lattice Semiconductor
Programmable Logic DesignLine (06/25/08, 10:42:00 AM EDT)

CPLDs offer designers a low-cost system solution with significant advantages compared to traditional implementations using ASICs and ASSPs.

The rapid proliferation of handheld products, including mobile phones, personal media players, handheld video game players, and digital still cameras, continues to put increasing pressure on system designers to deliver new features and capabilities in a compressed time-to-market window. According to forecasts from the market intelligence firm iSuppli Corp., core semiconductor revenue in this space is expected to grow from an estimated $26B in 2008 to $30B in 2012, a CAGR of 4 percent (core is defined by iSuppli Corp. as ASSPs, ASICs and PLDs).

Traditionally, the logic requirements for handheld applications have been addressed by Application Specific Integrated Circuits (ASICs) and Application Specific Standard Products (ASSPs), and the use of programmable logic devices (PLDs) has been limited, due to the need for low standby power, small board space, and low cost. However, improved architectures that reduce power consumption, new packages for smaller form factors and lower cost per unit, are causing designers to choose PLDs due to their inherent time-to-market and design flexibility advantages over ASICs and ASSPs.

CPLD applications

Common applications for complex programmable logic devices (CPLDs) in handheld applications include power up sequencing, voltage level translation, timing control, interface bridging, I/O expansion, and discrete logic functions. A CPLD takes only a few microseconds to power up, which allows it to control the power up sequencing of other devices in a system.

CPLDs are also used to connect multiple devices that operate at different voltages within a handheld system. For example, a mobile phone requires a microcontroller to interface with peripheral devices, timer, and memory that operate at different voltage levels. The latest generation of CPLDs can interface with different voltage levels ranging from 3.3V to 1.5V, because they have a core power supply voltage (Vccint) that is independent of the output voltage (Vccio). Each I/O bank of the CPLD can be configured to operate at the unique voltage that is required to interface with the logic device. Fig 1 shows CPLD functions in a typical handheld system.

1. CPLD functions in a typical handheld system.

General purpose I/O expansion is another area where a CPLD can be used in conjunction with a microcontroller, ASIC, or ASSP to expand the total number of user I/Os. An additional advantage of a CPLD is that it allows a peripheral interface to be implemented and also be reprogrammed. CPLDs can also be used for interface bridging functions by connecting different I/O interfaces such as I2C, SPI and memory interfaces, as well as for implementing timing control for LCD panels within a handheld system.

Designers consider several factors when selecting a logic solution for use in handheld applications, including time to market, design flexibility, standby power consumption, board space, and system integration options.

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