English
Reducing system complexity by using a single-supply logic-level shifter
By Qadeer A Khan, Oregon State University, and Sanjay K Wadhwa and Kulbhushan Misri, Freescale Semiconductor
Planet Analog -- Jul 01, 2008 (9:56 AM)
VLSI technology is enabling the realization of complex System on Chip (SoC) designs where different parts of a system, such as analog and digital circuits, as well as passive components, are integrated onto a single chip. In such SoCs, different parts of the chip run at different voltages to achieve optimum speed/power ratios, and it is very common to have two or more voltage domains in a single chip. For communication among the different parts of a chip having different supply voltages, level shifters are required to convert the logic signal from one voltage level to the other voltage level. Level shifters are also required at the pad-ring and chip-core interface, where low-voltage logic signals from chip core are shifted to the higher voltage levels at which the pad ring is operating.
Planet Analog -- Jul 01, 2008 (9:56 AM)
VLSI technology is enabling the realization of complex System on Chip (SoC) designs where different parts of a system, such as analog and digital circuits, as well as passive components, are integrated onto a single chip. In such SoCs, different parts of the chip run at different voltages to achieve optimum speed/power ratios, and it is very common to have two or more voltage domains in a single chip. For communication among the different parts of a chip having different supply voltages, level shifters are required to convert the logic signal from one voltage level to the other voltage level. Level shifters are also required at the pad-ring and chip-core interface, where low-voltage logic signals from chip core are shifted to the higher voltage levels at which the pad ring is operating.
|
E-mail This Article | 
|
|
Printer-Friendly Page |
Related Articles
- A High Density, High Performance, Low Power Level Shifter
- Low Power Bi-directional Level Shifter
- Single core to multicore: Addressing the system design paradigm shift with project management and software instrumentation
- Static Formal Verification for System Level Verification
- Metrix Driven Hardware Software System Level Verification
New Articles
- Discover new Tessent UltraSight-V from Siemens EDA, and accelerate your RISC-V development.
- The Critical Factors of a High-performance Audio Codec - What Chip Designers Need to Know
- Density Management in Analog Layout Design: Addressing Issues and Ensuring Consistency
- Nexus: A Lightweight and Scalable Multi-Agent Framework for Complex Tasks Automation
- How the Ability to Manage Register Specifications Helps You Create More Competitive Products
Most Popular
- System Verilog Assertions Simplified
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Synthesis Methodology & Netlist Qualification
- Discover new Tessent UltraSight-V from Siemens EDA, and accelerate your RISC-V development.
- Understanding Logic Equivalence Check (LEC) Flow and Its Challenges and Proposed Solution