Using FPGAs to improve your wireless subsystem's performance
Embedded.com (08/25/08, 09:05:00 AM EDT)
You can realize significant improvements in the performance of signal processing functions in wireless systems. How? By taking advantage of the flexibility of FPGA fabric and the embedded DSP blocks in current FPGA architectures for operations that can benefit from parallelism.
Common examples of operations found in wireless applications include FIR filtering, Fast Fourier Transforms (FFTs), digital down and up conversion and Forwared Error Correction (FEC) blocks.
By offloading operations that require high-speed parallel processing onto the FPGA and leaving operations that require high-speed serial processing on the processor, overall system performance and cost can be optimized while lowering system requirements.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
|
Xilinx, Inc. Hot IP
Related Articles
- Using FPGAs to Improve the Performance of Radar, Navigation and Guidance Systems
- Why Transceiver-Rich FPGAs Are Suitable for Vehicle Infotainment System Designs
- How to Turbo Charge Your SoC's CPU(s)
- FPGAs - The Logical Solution to the Microcontroller Shortage
- CPU Soft IP for FPGAs Delivers HDL Optimization and Supply Chain Integrity
New Articles
- Beyond Limits: Unleashing the 10.7 Gbps LPDDR5X Subsystem
- How to Design Secure SoCs: Essential Security Features for Digital Designers
- System level on-chip monitoring and analytics with Tessent Embedded Analytics
- What tamper detection IP brings to SoC designs
- RISC-V in 2025: Progress, Challenges,and What's Next for Automotive & OpenHardware
Most Popular
- System Verilog Assertions Simplified
- Beyond Limits: Unleashing the 10.7 Gbps LPDDR5X Subsystem
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Design Rule Checks (DRC) - A Practical View for 28nm Technology
- How to Design Secure SoCs: Essential Security Features for Digital Designers