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Picking the right MPSoC-based video architecture: Part 2
Optimal CPU configurations and interconnections
By Santanu Dutta, Jens Rennert, Tiehan Lv, Jiang Xu, Shengqi Yang, and Wayne Wolf
Embedded.com (08/18/09, 12:15:00 AM EDT)
For the ever increasing set of media-processing applications, improving the performance of the execution of a single instruction stream often results in only a limited overall gain in the system performance. Intuition and experiments suggest that for these applications, much better performance can be achieved by employing multiple processors that share the burden of controlling the necessary real-time and non-real-time tasks.
By Santanu Dutta, Jens Rennert, Tiehan Lv, Jiang Xu, Shengqi Yang, and Wayne Wolf
Embedded.com (08/18/09, 12:15:00 AM EDT)
For the ever increasing set of media-processing applications, improving the performance of the execution of a single instruction stream often results in only a limited overall gain in the system performance. Intuition and experiments suggest that for these applications, much better performance can be achieved by employing multiple processors that share the burden of controlling the necessary real-time and non-real-time tasks.
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