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ICE-IP-338 High-speed XTS-GCM Multi Stream Inline Cipher Engine
Migrating ARM7 Code to a Cortex-M3 MCU (Part 2)
In Part 1 in this series, I dealt with the myriad of details relating to exception vector table formating, startup code/stack configuration, remapping RAM functions, and hardware interrupt configuration that a programmer must be concerned with porting code from an existing ARM7 to the Cortex-M3 core. Now in this second part, the tutorial continues with a discussion of software interrupts, fault handling, the SWP command, instruction time, assembly language, and optimizations.
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