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Process Detector (For DVFS and monitoring process variation)
Low power design is here to stay
How about your existing verification strategy?
By Krishna Balachandran, director of product marketing, Low Power Verification Products, Synopsys Inc.
edadesignline.com (January 06, 2010)
Low power design drivers
Low power design is not new. Extending battery life for mobile devices meant playing design tricks to conserve energy in every possible way. The desire to integrate a system on a chip and reduce overall cost led designers to rapidly adopt advanced manufacturing processes. The move to smaller manufacturing geometries accelerated the need for low power design because of the exponential increase in leakage power from smaller transistors packed in ever larger numbers on a single chip.
Governmental regulations have been a more recent driver. Driven by the popularity of green initiatives, specifications have been standardized for power consumption for almost all household electronic gadgets. The regulations impose limits on how much energy a device can consume when it is idle, which has the far reaching effect of extending low power design to even plugged-in-the wall devices. What is new is that almost all electronic designs are becoming power managed designs. Verification of low power designs, which until recently was a challenge for just a handful of all designs, is fast becoming every designer's problem.
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