PLDs make inroads with processor designs

PLDs make inroads with processor designs
By Crista Souza, EBN
October 15, 2001 (3:57 p.m. EST)
URL: http://www.eetimes.com/story/OEG20011015S0042

When programmable logic suppliers first set out to put microprocessors on their chips, market watchers were impressed by the concept despite reservations about the ability to mass manufacture them.

Two years later, suppliers report hundreds of design registrations for their embedded devices. This week, three --Altera, QuickLogic, and Xilinx -- will announce that parts are shipping to customers. And with at least a half-dozen contenders now vying for a slice of the market, analysts say the industry is about to wake up to a new reality.

"Vendors are recognizing that programmable logic in an ASIC is not just a nice thing to have anymore. It's becoming an absolute requirement," said Cary Snyder, an analyst at MicroDesign Resources, which is hosting this week's Microprocessor Forum in San Jose.

The conference will for the first time feature a session on programmable logic, an indication that OEMs are changing the way they think about system des ign.

Snyder said the increasing cost of leading-edge technologies, coupled with shrinking market windows, leaves little margin for error in bringing complex designs to market. The trade-off for programmability has always been high cost, but rapid advancements in process technology have helped lower the cost of programmable silicon, he said.

"The price delta [of using a PLD with an embedded processor] is equivalent to buying an APEX and a discrete ARM processor with peripherals," said Anna Chiang, director of marketing at Altera Corp.'s Excalibur embedded processor product line. "So you get the flexibility of being able to prototype a design without paying a price penalty."

Design software advancements have contributed to the acceptance of embedded cores in PLDs and FPGAs, said analyst Bill McClean of IC Insights Inc., Scottsdale, Ariz.

"Almost all [suppliers'] R&D budgets are going toward [developing] sophisticated design tools to give customers a good feeling about the reliability of put ting these things in their systems," McClean said.

Evolutionary deployment

Still, broad deployment of the embedded devices is likely to be evolutionary, rather than explosive. "Xilinx is still not shipping its PowerPC-based parts, yet it's the number one supplier of FPGAs, so that tells you how difficult it is to do this," McClean said.

Xilinx Inc. has chosen to initially introduce a soft processor called MicroBlaze. The San Jose company today will announce production availability of the 32-bit core, which features a Harvard RISC architecture with 900 logic cells and a speed of more than 125MHz, or 82 Dhrystone mips.

The MicroBlaze release includes access to nine common MPU peripherals designed to plug into IBM Corp.'s CoreConnect IP bus. Both the peripherals and bus will also be available with Xilinx's embedded PowerPC product, so customers can combine multiple soft and embedded processors on the same FPGA platform, said Mark Aaldering, senior director of the IP Solutions Divisi on at the San Jose-based company.

There is expanding market demand for FPGAs with soft processors because with both on the same chip, redesigning devices in the field is a simpler task, Aaldering said.

"The customer can fully and completely change anything --hardware and software -- in the field," he said. "The most expensive thing you can have to do is send a field guy out to do a service call. Anything you can do over the phone or the Internet makes the cost of the product lower."

Meanwhile, Xilinx's cross-town rival, Altera Corp., said it has begun production shipments of its first ARM-based Excalibur product, the EPXA10, though the company declined to name its initial customers. Built on the APEX 20KE PLD architecture, the device features multiple clock domains to allow the processor to operate at its full 200MHz speed unfettered by slower PLD or peripheral performance.

New Nios version

Additionally, Altera is releasing Version 2.0 of the 16/32-bit Nios soft processor, w hich boosts performance to 80MHz from 33MHz and enables custom tailoring of the peripheral set, according to Chiang.

"If a designer wants two UARTs instead of one, there's no mechanism for them to get it when buying a microcontroller off the shelf," she said. "Using our SOPC Builder software, it's a fairly easy process to add additional peripherals."

In addition to a faster clock speed, Nios 2.0 features a simultaneous multimaster bus and user-defined instruction extensions to allow designers to improve overall system performance, Chiang said. An on-chip debug peripheral is aimed at accelerating the software development process.

Giving customers the option of test driving IP in hardware before buying it, Altera today will extend its OpenCore Plus program-first announced in conjunction with its DSP Builder product-to the Excalibur family.

Altera today will also announce the creation of the Excalibur Partner Program, bringing together leaders in real-time operating systems, embedded softwar e, hardware design support, and IP. Another new offering, the Excalibur Certified Design Centers program, is tapping a number of authorized ARM design partners like Siemens and Tality.

QuickLogic Corp. today will announce that its first QuickMIPS device is available in volume. The QL901M is based on MIPS Technologies Inc.'s MIPS32 4Kc core, which runs at 133MHz on 0.25-micron technology or up to 175-MHz on 0.15-micron.

The IC integrates 457,000 system gates, two 10/100 Ethernet controllers, a 32-bit 66/33MHz PCI interface, multifunction memory controller, and an interrupt controller. A 32-bit Advanced Peripheral Bus gives access to four 32-bit timers and two UARTs.

Additional reporting by Jeanne Graham