NVM OTP NeoBit in Maxchip (180nm, 160nm, 150nm, 110nm, 90nm, 80nm)
Mixed-signal and power-integration packaging solutions
By Jim Gillberg, Director of Automotive Development, Fairchild Semiconductor Corp.
Power Management DesignLine (05/17/10, 06:30:00 AM EDT)
Even before the first transistor was invented, there has been a constant drive to integrate more and more functionality into a single product. There are the obvious cost benefits to putting more functions into the same package or die area, but there are also performance benefits realized by integrating more devices into a single product. For high -peed functions, every signal that must be connected from one integrated circuit to another slows the system down by the addition of significant input/output capacitances for each pin, as well as PC-board routing which requires larger line drivers with more cost and more board area.
In the realm of integrated circuits, this constant need for higher integration has, for the most part, been achieved through constant improvements in the photolithography used to fabricate the devices. Equipment has evolved from contact printing with 0.1 mil resolution through projection printing, use of high-resolution steppers, to direct-write on wafers with E-beam technology, to where we now talk about nanometers of photo resolution.
For a long time, this progress has followed what is generally referred to as Moore's’ law. This defines the ever-increasing complexity of a product that can be integrated onto a piece of silicon. This has defined progress over time for microprocessors, silicon memory, and ASICs. While process complexity has increased to be able to define these extremely small feature sizes, today’s basic lateral CMOS transistors would be recognized by its original inventor.
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