Processor technology pace may slightly accelerate in 2001 technology roadmap

Processor technology pace may slightly accelerate in 2001 technology roadmap
By Jack Robertson, EBN
July 19, 2001 (1:28 p.m. EST)
URL: http://www.eetimes.com/story/OEG20010719S0031

SAN FRANCISCO -- The 2001 International Technology Roadmap for Semiconductors now being drafted may slightly accelerate the timetable for new microprocessor generations, but so far it is keeping the existing schedule for introducing new DRAM process generations, said industry officials here during the Semicon West trade show.

The first draft of the document was unveiled at an ITRS meeting, which was held concurrently with Semicon West on Wednesday. During the next five months, semiconductor roadmap committees will continue to refine the 2001 document, which is scheduled to be unveiled in a final version for the chip industry on Nov. 29 in South Korea.

"Microprocessor and logic parameters may end up being moved up slightly, but the 1999 roadmap on DRAMs is likely to remain unchanged," said Robert Doering, a senior fellow for silicon technology development at Texas Instruments Inc. and a deputy ITRS leader. So far, the new technology roadmap under discussion has relatively few surprises from the last major version introduced two years ago, he said in an interview.

The existing 1999 roadmap shows microprocessor frequencies hitting 2.1-GHz clock rates this year--a milestone that's is being reached by MPU makers. The existing 1999 roadmap also shows clock frequencies increasing to 2.5 GHz in 2002, and then 2.9 GHz in 2003, followed by 3.5 GHz in 2004, and 4.15 GHz in 2005. Doering said the first draft of the 2001 documents from the ITRS technical working group indicates that die shrinks with finer device geometries may slightly accelerate in the future. If so, that could mean processor clock speeds will move forward on a faster timetable in the final 2001 ITRS.

By contrast, first drafts of the new roadmap show DRAM technologies remaining on the same schedule outlined in 1999. That schedule shows 2-gigabit DRAMs being initially introduced in 2001, with 4-Gbit memories rolling out in 2003. The existing roadmap also shows 8-Gbit DRAMs being introdu ced in 2005 and 20-Gbit chips in 2008. Further out, the current industry roadmap says DRAMs will reach 45 Gbits in 2011 and 104 Gbits in 2014.

Many industry experts believe that the pace of DRAM technology will not likely accelerate in this decade, partly because of economic conditions in the troubled memory markets. Total revenues for DRAM products have continued to fall despite consolidation among the top players. DRAM revenues are expected to only reach $14 billion in 2001 compared to the highpoint of just over $41 billion in 1995, according to Dataquest Inc. (see June 21 story). The market conditions and lack of profits have doused some efforts to accelerate DRAM technologies and placed the memories on a slower pace compared to MPU/logic processes.

Two years ago, for example, the initial draft of the 1999 DRAM roadmap was revised to a slower pace before being finalized. The original draft had DRAM technology racing ahead to th e 1-terabit generation by 2014--a goal that DRAM makers said was not needed by the market in 2014, even if those devices could be built.

For purists, the 2001 roadmap will recalibrate the benchmarks for some of the upcoming chip generations to reflect the precise die-shrink geometries for new nodes. Thus, the former "0.10-micron" node becomes "0.09 micron." The 0.07-micron node will become 0.065-micron, and the 0.05-micron becomes 0.045-micron.

Doering said the 2001 roadmap for the first time will include detailed parameters for system-on-a-chip devices. The 1999 version included a general discussion of SoC, which were considered at the time too new to create a track record for making a roadmap forecast. Doering said SoC are now mature so a more detailed technology forecast can be made.

"One approach the SoC technical working group is using is to come up with an overall model, which people can plug in various numbers based on the wide ranging different types of SoCs," he said. The TI fellow point ed out that SoCs are so varied that it would be almost impossible to generate one overall set of technology parameters for each year in the roadmap.

Doering also said the 2001 roadmap will retain most of the future technical roadblock challenges that are listed in the 1999 document in each area of semiconductor design, fabrication and packaging. The 1999 roadmap highlighted each of the roadblocks in red in appendix tables. A few of the "red" problem areas have been solved by the industry, he said, but in most cases the "red" roadblocks still remain.

"In some cases they have been moved out another year or more, as [ITRS] members felt the industry might have a little more time to solve the issues," explained Doering in the interview.

He said the 2001 roadmap still envisions 157-nanometer wavelength lithography systems being introduced at the now-defined 0.45-micron chip node and probably extending down to 0.25-micron node. That is where the Next Generation Lithography (NGL) systems -- either extrem e ultraviolet (EUV) or electron-beam projection -- have been targeted for introduction. Doering said like all lithography generations, there will probably be an overlap of 157-nm and NGL at this node.