Use XML to build ASIC or SoC design specifications
Karen H. Wang, SiBEAM, Inc.
EETimes (7/31/2010 7:51 PM EDT)
In a semiconductor company, the ASIC engineers design the hardware, and the hardware specification is distributed to other teams for hardware validation, embedded software development, and data-sheet documentation. Unfortunately, no standardized tools to document and distribute the specification exist. ASIC engineers often use common tools, such as Microsoft's Word or Excel, or even a plain text editor; these "tools" have many shortcomings when used to create a hardware specification.
First, these tools cannot easily convey the structure of a hardware specification. The hardware design of a chip typically has a tree-like hierarchy--the chip has several logical blocks, each block contains many registers, and each register has multiple bitfields, as shown in Figure 1.
E-mail This Article | Printer-Friendly Page |
|
Related Articles
New Articles
- Quantum Readiness Considerations for Suppliers and Manufacturers
- A Rad Hard ASIC Design Approach: Triple Modular Redundancy (TMR)
- Early Interactive Short Isolation for Faster SoC Verification
- The Ideal Crypto Coprocessor with Root of Trust to Support Customer Complete Full Chip Evaluation: PUFcc gained SESIP and PSA Certified™ Level 3 RoT Component Certification
- Advanced Packaging and Chiplets Can Be for Everyone
Most Popular
- System Verilog Assertions Simplified
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- UPF Constraint coding for SoC - A Case Study
- Dynamic Memory Allocation and Fragmentation in C and C++
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)