English
Process Detector (For DVFS and monitoring process variation)
Use XML to build ASIC or SoC design specifications
Karen H. Wang, SiBEAM, Inc.
EETimes (7/31/2010 7:51 PM EDT)
In a semiconductor company, the ASIC engineers design the hardware, and the hardware specification is distributed to other teams for hardware validation, embedded software development, and data-sheet documentation. Unfortunately, no standardized tools to document and distribute the specification exist. ASIC engineers often use common tools, such as Microsoft's Word or Excel, or even a plain text editor; these "tools" have many shortcomings when used to create a hardware specification.
First, these tools cannot easily convey the structure of a hardware specification. The hardware design of a chip typically has a tree-like hierarchy--the chip has several logical blocks, each block contains many registers, and each register has multiple bitfields, as shown in Figure 1.
|
E-mail This Article | 
|
|
Printer-Friendly Page |
|
||||||
Related Articles
New Articles
- Why RISC-V is a viable option for safety-critical applications
- Dimensioning in 3D space: Object Volumetric Measurement by Leveraging Depth Camera-based Reconstruction on NVIDIA Edge devices
- What is JESD204B? Quick summary of the standard
- Post-Quantum Cryptography - Securing Semiconductors in a Post-Quantum World
- Analysis and Summary on Clock Generator Circuits and PLL Design
Most Popular
- System Verilog Assertions Simplified
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)
- An Outline of the Semiconductor Chip Design Flow
- Design Rule Checks (DRC) - A Practical View for 28nm Technology
- Synthesis Methodology & Netlist Qualification