New survey shows foundry pricing paid by fabless chip companies
New survey shows foundry pricing paid by fabless chip companies
By Semiconductor Business News
May 14, 2001 (7:10 p.m. EST)
URL: http://www.eetimes.com/story/OEG20010514S0103
SAN JOSE -- The Fabless Semiconductor Association today released the results of its first quarterly wafer pricing survey, which shows respondents paying a "fabless weighted average" of $2,569 for wafers processed with 0.25-micron technologies in Q1. The survey covers a range of fabrication technologies, six- and 8-inch diameter substrates, IC-interconnect capabilities, and other aspects of foundry processes. The "fabless weighted average" for more mature 0.80-micron process technologies was $457 per wafer in the first quarter of 2001, according to the survey. The Fabless Semiconductor Association said its "fabless weighted average price" was based solely on the number of wafers booked by fabless chip houses and the amount paid by companies in their most recent purchase order during the quarter. This average can be different than the average sales prices (ASPs) at foundries because ASPs are often calculated with a range of factors, said the trade group. The association did not make a comparison with previous pricing trends since the first-quarter survey was the initial poll conducted by the group. However, the trade association figures it can help fabless chip companies gauge how much they should be expecting to pay for processed wafers in the future. "While there are a few resources for wafer pricing within the semiconductor industry based on the price foundries charge per wafer, no survey focuses specifically on the price that fabless companies are actually paying per wafer," stated Jodi Shelton, executive director, FSA. The FSA's weighted average wafer price for 6-inch (150-mm) substrates was $759, compared to $2,410 for 8-inch (200-mm) wafers.
Related Articles
- Survey shows SoC design data management is mission critical
- SEMI survey shows '02 fab-tool market to fall 32%
- Is foundry broker model the next thing in fabless business?
- The complete series of high-end DDR IP solutions of Innosilicon is industry-leading and across major foundry processes
- Is Intel within ARM's reach? Pedestrian Detection shows the way
New Articles
Most Popular
- System Verilog Assertions Simplified
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Synthesis Methodology & Netlist Qualification
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)
- Demystifying MIPI C-PHY / DPHY Subsystem
E-mail This Article | Printer-Friendly Page |