400G ultra low latency 56/112G FEC and SERDES IP sub 10ns latency
A case for not choosing the latest components
By Dwight Bues, EE Times Guru
The 1980s were the halcyon days of circuit board design. In the days before Gate Arrays were inexpensively available with sufficient gate counts to completely implement the desired functionality, many manufacturers were producing ICs that implemented functional blocks that could be included in widely varied designs.
Since I was employed designing VME Bus circuit boards at that time, I recall having great flexibility in implementing my designs.Enter the engineer whom we called “Mr. VVI” behind his back.Incidentally, VVI stands for Vanished Vendor Item.A VVI is a device that, although you verified its availability with the vendor, they either never actually did produce or unexpectedly cancelled.
E-mail This Article | Printer-Friendly Page |
Related Articles
- Choosing the right A/D converter architecture and IP to meet the latest high speed wireless standards
- Key considerations and challenges when choosing LDOs
- An FPGA-to-ASIC case study for refining smart meter design
- SoC design: When is a network-on-chip (NoC) not enough?
- Radiation Tolerance is not just for Rocket Scientists: Mitigating Digital Logic Soft Errors in the Terrestrial Environment
New Articles
- Quantum Readiness Considerations for Suppliers and Manufacturers
- A Rad Hard ASIC Design Approach: Triple Modular Redundancy (TMR)
- Early Interactive Short Isolation for Faster SoC Verification
- The Ideal Crypto Coprocessor with Root of Trust to Support Customer Complete Full Chip Evaluation: PUFcc gained SESIP and PSA Certified™ Level 3 RoT Component Certification
- Advanced Packaging and Chiplets Can Be for Everyone