Fabless ASIC model debated
Fabless ASIC model debated
By David Lammers, EE Times
April 19, 2001 (4:41 p.m. EST)
URL: http://www.eetimes.com/story/OEG20010419S0065
SANTA CLARA, Calif. ASIC-sector luminaries this week debated whether the trend away from vertical integration which has spawned specialized companies in assembly and test, electronic design automation, foundry and intellectual-property (IP) cores will extend to the creation of a fabless ASIC sector as well. Highly profitable and growing at a healthy clip, the ASIC industry nevertheless is under pressure. System vendors are increasingly looking in-house, or to design-services companies, for the designs that can be taken directly to foundries for manufacturing. ASICS flow to foundries Large system vendors such as Sun Microsystems Inc. and Cisco routinely design their own ASICs and take them directly to foundries, a flow dubbed COT for customer-owned tooling. In addition to using foundries, the fabless ASIC vendors of such a new sector would also rely on commercially available IP, Web-based EDA tools and ot her outside service providers. But road blocks may appear to bar the sector's growth, suggested Mike Hackworth, who was in the vanguard of the fabless IC industry. Hackworth spoke on a panel co-sponsored by the EDTN Network and fabless ASIC pioneer eSilicon Corp. (Santa Clara). He said access to foundry capacity during an upturn was a major problem during the halcyon years at Cirrus Logic, when PC OEMs relied on Cirrus for huge volumes of graphics ICs. Fabless ASIC vendors, he warned, will need to have multiple foundry sources in order to guarantee supply during times of tight capacity. "In the early days of the fabless industry, reactions went from rejection to ridicule, and then to acceptance. I remember Jerry Sanders telling me that real men have fabs," Hackworth said, predicting that the same process of gradual acceptance will unfold with fabless ASIC vendors. Hackworth, who founded Cirrus Logic, advised designers to "start out carefully" by targeting designs that stay well within the perfor mance margins of the targeted process. Jack Harding, the former Cadence executive who is the chief executive officer at eSilicon, said his company plans to stay at "N minus 1," thus avoiding bleeding-edge process technology and tools. "We don't want to debug the latest EDA tools," he said. His company will use 0.18-micron design rules, he said, rather than the 0.13-micron processes now coming on stream at the leading ASIC vendors. Christine King, vice president of IBM Microelectronics and the person credited with IBM's thrust into the merchant ASIC market, said fabless ASIC vendors may find it difficult to provide fast, direct answers to customers. She said at IBM, designers are "joined at the hip" with the silicon, packaging and IP cores developed within IBM. And because of that tight linkage, IBM can offer high-speed interface cores, PowerPC processors and other high-performance cores. The question of legal responsibility was raised by Bryan Lewis, director of the ASIC analysis group at Dataque st. Lewis hammered away at the issue of whether a dissatisfied OEM would sue a fabless ASIC vendor over a failed chip. Harding of eSilicon said his company would stand behind its guarantees of working silicon. "We accept responsibility for the tested and packaged chip, and I'm confident that we can match that guarantee," Harding said. However, Dataquest's Lewis countered that the fabless ASIC vendors may not have the financial strength to provide such guarantees. Hackworth called the legal issue a non sequitur and said the fabless ASIC concept will not live or die on the issue. More central is whether the division of labor that has marked the modern history of the semiconductor industry starting with Anam Semiconductor Inc.'s success in establishing the outsource assembly industry in the '60s will extend to the collection of services provided by ASIC vendors. "We are accountable to our customers and provide one seamless face to the customer, with a very short line for the custo mer to get back to us with questions," King said. She acknowledged that fabless ASIC vendors will find a place within the industry. IBM is building a 300-mm logic fab at East Fishkill, N.Y., that is expected to open at the end of next year, and King said IBM is in the midst of a "major initiative that includes looking at how we price our ASIC services." Also, high-volume products from IBM's design agreements with companies such as Nintendo and Sony for the game-console market are expected to help fill the new fab, she said. Lewis said Dataquest's top-10 ranking of ASIC vendors for 2000 showed IBM's ASIC revenue increasing by 39 percent in 2000, to about $2.7 billion. However, much of that silicon is consumed within IBM system divisions, and IBM ranks third in merchant ASIC sales.