English
NoC Silicon IP for RISC-V based chips supporting the TileLink protocol
How to reduce board management costs, failures, and design time
Shyam Chandra, Lattice Semiconductor
EETimes (10/12/2010 8:40 AM EDT)
In order to meet the demands of increased functionality, performance, and reduced power, many modern circuit boards use highly integrated CPUs, ASSPs, ASICs, and memory devices to implement the circuit board’s main function (the payload function).
Boards of this complexity are particularly common in equipment designed for communications infrastructures, computer servers, and higher end industrial and medical systems. Because the ICs on the board are usually fabricated with fine transistor geometries, they require multiple power supply rails with tight tolerances to operate. Typically, seven to ten supplies are needed in a complex circuit board, with higher numbers not unusual.
The management of these supplies – along with other system management tasks – is increasing in complexity and cost. This is leading many board designers to ask: "How can I reduce the cost and complexity associated with implementing board management?"
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