SoCs mark dawn of industry's golden era, execs say
SoCs mark dawn of industry's golden era, execs say
By Peter Clarke and Junko Yoshida, EE Times
November 21, 2000 (2:57 p.m. EST)
URL: http://www.eetimes.com/story/OEG20001121S0059
MUNICH, Germany The adoption of system-on-chip (SoC) design and manufacturing marks the beginning of a golden age for microelectronics, according to the heads of six leading semiconductor companies represented on this year's Electronica CEO panel, though significant technical and commercial challenges remain. Some panelists said new theoretical breakthroughs and computational architectures are needed make the most of designs featuring tens of millions of gates. Others said the biggest challenge facing industry is making full use of current engineering resources. While SoCs mark a major revolution the complexity, they place heavy demands on industry players, panelists said. A principal concern is the shortage of engineers, which is starting to impact industry, the executives said. "The limitation on resources means we have been forced to concentrate on a few niches," said Ulrich Schumacher, chief executive of Infineon Technologies A G. "We've got 1,500 engineers in wireless and 1,000 in broadband engineering. We clearly have been forced to concentrate on communications with maybe a second spot in automotive." The issue of technical challenges was raised by Fred Shlapak, president of Motorola Inc.'s Semiconductor Products Sector, who said that logic gate densities were rising above 250,000 gates per square millimeter and in a few years time would hit 400,000 to 500,000 gates per square millimeter. Aside from the need to support multiple technologies such as various computation engines, memory, mixed-signal and analog components, Shlapak said the SoC manufacturing revolution must be accompanied by an architectural revolution to make the best use of the millions of gates that are becoming available. "One challenge ahead is going to be the simulation and verification at a high-level before you go to silicon, because mask set costs are also going up," he said. While there is currently much discussion of adding embedded DRAM and e mbedded flash memory to logic design flows, Shlapak said that eventually logic will be added to memory design flows, with die containing predominantly memory accompanied by a tiny proportion of logic. Much of the discussion between panelists focused on the evolution of traditional mainstream semiconductor companies. "SoC is the natural evolution of the industry," said Pasquale Pistorio, chief executive officer of STMicroelectronics. "A revolution occurs every 10 years. It's now impossible to deal with single transistors and gates in systems of this complexity. "I also would point out," Pistorio added, "that SoC can have significant effect in time-to-volume. We would not be able to get to market on time if we didn't work at this high level. But very few companies will be able to master SoC." While Schumacher told how Infineon would focus on communications and a few other high-growth opportunities, Pistorio painted a picture of STMicro focusing on many topics wireless, computer periphera ls, digital consumer, automotive and smart card applications. But Pistorio revisited a topic raised by Schumacher. "Resources: this is the most important challenge CEOs face," Pistorio said. "The beginning of our industry was technology intensive, then it became capital intensive, and is now becoming brain-power intensive." Arthur van der Poel, chief executive officer of Philips Semiconductors, said that increased integration is creating a more volatile environment. "The main problem is resources," he said. "What was a six-chip solution allowed two or three companies to cooperate and focus on different ends of the market. When it's one chip it becomes a binary business. If you miss a detail in the top right hand corner you fail. It is requiring a very big up-front investment, but it's a binary business." Schumacher cautioned that the technology development for SoCs is "not done yet." Indicating how significant the SoC business will become, both Philips and STMicro executives agreed that two-t hirds of their R&D resources are now spent on SoC development, with the remainder spent on technology platform development. Juergen Knorr, chairman of Microelectronics Developments for European Applications (Medea), a collaborative research project, and Hans-Dieter Mackowiak, senior vice president for U.S. sales and marketing at Samsung Semiconductor, also participated in the panel discussion.
Related Articles
New Articles
Most Popular
- System Verilog Assertions Simplified
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)
- Synthesis Methodology & Netlist Qualification
- Streamlining SoC Design with IDS-Integrate™
E-mail This Article | Printer-Friendly Page |