English
Building FPGA-based digital downconverters with graphical design tools
Ryan Verret, National Instruments
EETimes (12/8/2010 11:11 AM EST)
High bandwidth digital downconverters (DDCs) are critical components in many high-performance systems, including receivers of modulated communications, medical imaging devices, and low-level RF control hardware for scientific research.
Modern graphical programming tools and commercial, off-the-shelf hardware have progressed to the point that they can be used to implement high-performance designs with minimal FPGA-specific knowledge. A number of such high-level and graphical design tools exist, along with a variety of FPGA-based I/O hardware.
|
E-mail This Article | 
|
|
Printer-Friendly Page |
|
||||||
Related Articles
- PRODUCT HOW-TO: Building an FPGA-based Digital Down Converter
- Reduce Time to Market for FPGA-Based Communication and Datacenter Applications
- How to Reduce FPGA Logic Cell Usage by >x5 for Floating-Point FFTs
- FPGA-Based Functional Safety for Industrial Applications
- How to prevent FPGA-based projects from going astray
New Articles
- Why RISC-V is a viable option for safety-critical applications
- Dimensioning in 3D space: Object Volumetric Measurement by Leveraging Depth Camera-based Reconstruction on NVIDIA Edge devices
- What is JESD204B? Quick summary of the standard
- Post-Quantum Cryptography - Securing Semiconductors in a Post-Quantum World
- Analysis and Summary on Clock Generator Circuits and PLL Design
Most Popular
- System Verilog Assertions Simplified
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Method for Booting ARM Based Multi-Core SoCs
- An Outline of the Semiconductor Chip Design Flow