Using mixed-signal FPGAs to take motion control to the next step
Yvonne Lin, Microsemi Corporation
12/10/2010 12:17 PM EST
Abstract
Motion control systems (and by extension, motor control methods) are becoming more complex as they address ever escalating market needs. Increasing demands for energy efficiency, increased functionality, reduced size, and higher levels of integration push designers to look for more innovative solutions.
Until now, the available solutions involved control algorithms implemented in digital signal processors or microcontrollers. However, to achieve the response time required for complex motor control algorithms such as field-oriented control, hardware acceleration is often required.
In addition, analog circuitry is needed to read sensors, determine position and speed, check for faults, monitor temperature, etc., plus digital connections are required to interface with the rest of the system. The resulting collection of discrete devices delivered a solution that fell short in reliability, integration, and cost.
What has eluded the designer until now has been a single-chip solution that can address all of these needs; that is, until the introduction of SmartFusion mixed signal FPGAs. Microsemi’s SmartFusion device combines the three elements required by designers of next-generation motion control systems – a high-performance microcontroller, dense FPGA fabric, and programmable analog – all in a single package, allowing designers to achieve both high levels of integration and low cost.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
|
Microsemi Hot IP
Related Articles
New Articles
- Why RISC-V is a viable option for safety-critical applications
- Dimensioning in 3D space: Object Volumetric Measurement by Leveraging Depth Camera-based Reconstruction on NVIDIA Edge devices
- What is JESD204B? Quick summary of the standard
- Post-Quantum Cryptography - Securing Semiconductors in a Post-Quantum World
- Analysis and Summary on Clock Generator Circuits and PLL Design
Most Popular
- System Verilog Assertions Simplified
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Method for Booting ARM Based Multi-Core SoCs
- An Outline of the Semiconductor Chip Design Flow