SoCs: DSP World, Cores -> DSP World sets pace in performance, apps

To kick off the conference, this week's contributions highlight excerpts from several papers as well as ongoing work on DSP core developments. Among them, the DSP industry's most widely known independent benchmarking company, Berkeley Design Technology Inc. (BDTI, Berkeley, Calif.), offe rs some astute observations about performance. DSP analyst, Jennifer Eyre and co-founder, Jeff Bier lead the section with an extensive discussion about the architectures of some newer DSP processors such as the ARM9E from Advanced RISC Machines (ARM) and Infineon's TriCore processor. An accompanying piece from BDIT targets benchmarking and general-purpose processors. With clock rates approaching one gigahertz, X86 processors and their competitors can achieve respectable DSP performance in some applications.

For DSP SoC devices to become widespread rather than a technical tour-de-force of a few corporations, collaborative designs with intellectual capital will be key, say DSP consultant Robert Owen (left) and Hellobrain.com's Shiv Balakrishnan.

Genera l-purpose processors are often used in personal computers to perform some aspects of video processing. This hidden DSP function means that video signal processing is often taken for granted. In a session called "Video and Graphic A/D and D/A Conversion for HDTV and Flat Panel Applications," Senior Systems Engineer, Bart DeCanne of Texas Instruments Inc. (Dallas) will address the combination of video and data services broadcast using digital television. In the short term, DeCanne believes data delivery over digital TV broadcast will be achieved with PCs. Part of the delivery of digital data will be governed by copy protection currently under development that permits one generation of copy, no copies or unlimited copies.

And, in another major host-based application, modem functionality is increasingly performed by the CPU. These systems split signal processing between an ASIC and the host CPU. Faster modems require higher performance timing recovery and synchronization. Both of these topics will be co vered in sessions offered by Fred Harris, who holds the Cubic signal processing chair at San Diego State University and is no stranger to the DSP world. An original contributor to DSP theory, Harris will examine the technical issues relating to DSP-based modems in sessions on "Phase-Locked Loops" and "Synchronization Techniques."

Putting different media streams together is the dream of many engineers. In his article, excerpted from a session at the conference, Cisco Systems' (San Jose) Prashant Gandhi, solutions architect, offers one perspective of how to provide a combination of data, telephone and video service over a single broadband cable such as those installed in consumers' homes. In a session called "Systems Architecture for Broadband," Gandhi discusses what some believe will be the way of the future. By exploiting the ubiquitous cable-TV infrastructure, providers hope to deliver telephone via Voice over Internet Protocol, data using two-way Internet Protocol and digital video services using t he same cable.

But processing signals that can transmit the high data rates implied by media streaming require high-performance DSPs. One trick to achieving the fastest performance is to locate all of the program and data on a single-chip DSP. For over a decade Analog Devices Inc. (ADI; Norwood, Mass.) has championed the use of static RAM for program memory on a DSP chip. Starting with the ADSP2101 in 1989, ADI has remained on a path of ever-increasing amounts of memory on DSP chips. In a review of on-chip memory architectures ADI engineers, Greg Geerling and Cooper Lau lay out memory alternatives for DSP chips in their contribution, including instruction caches. The biggest impact of on-chip memory are the significant reductions in power consumption.

Meanwhile, multimedia has been a favorite application of many DSP vendors, although commercial results have been mixed. In his piece on SoC applications, Russell Priebe, director of applications development at Improv Systems Inc. (Beverly, Mass .) lays out a definition of SoC devices that includes memories, processors, peripherals and custom blocks. Priebe sees DSP SoC devices at a crossroad. They are shifting from core-based designs to platform-based designs employing complete, integrated, single-chip platforms. The notion is that designers will be engaged in hardware configuration and software development exclusively.

Even as their design methodology improves, SoC devices for digital signal processing may be unattainable. Like many other technologies, SoC is a moving target, one that by the nature of engineers' wishes remains tantalizingly just outside of reach. In 1980, as director of advanced development for ASIC pioneer American Microsystems Inc. (AMI), I was responsible for engineering an advanced series of gate arrays for ASICs built in a CMOS process. These base arrays were primitive by today's measure, capable of implementing at most a few thousand gates. Even with these limitations, the arrays could implement useful circuits that had system-level benefits. Still, something was missing.

At the time, Motorola was promoting a concept that it called "systems-on-silicon." It seemed as though everybody wanted whatever "systems-on-silicon" meant-even the folks in our marketing department. The appeal of the system-on-a-chip concept was incredible and the demand very real. Or so it seemed.

In 1987 Texas Instruments was searching for an answer to the problem of low-profit ICs. The answer, some thought, was ASICs employing system-on-chip technology. Like AMI, TI was drawn to SoC by the lure of achieving higher levels of integration while at the same time including high-profit megacells on each ASIC. These SoC devices were expected to produce high profits while maintaining a barrier against competition. Shortly after concluding a cross-license agreement that included TI's DSP products, TI's partner, Intel Corp., threw in the towel on its ASIC activities, killing the deal.

A difficult business

The experienc es at AMI and TI are not isolated. Nor are the reasons why some companies find the SoC business difficult. Many companies searching for a way to remain competitive have sought the SoC pot of gold. According to section contributors Shiv Balakrishnan, general manager at HelloBrain.com (Santa Clara), and Robert Owen, a consultant at Date/Time International (Saratoga, Calif.), "the move to SoC designs has had a profound effect on DSP system designers. Instead of dealing with a single discrete processor with a simple programming space that they control and standard peripherals arrayed along a single bus, they now need multiple processors in forms they can lay out on a chip and program with constantly changing software functions. Needed are complex peripherals, including mixed-signal ones, that conform to new standards on buses that are often of someone else's specification."

The authors point out that established third-party technical resources such as BDTI already exist in the DSP field to oversee and r eferee the technical integrity of these transactions independently, if necessary. "The existence of these new collaborative designs with intellectual capital may very well be key to the DSP SoC's becoming a widespread reality rather than just a technical tour de force of a few large corporations," they write.

The path to DSP systems-on-chip is complex. At every turn there is some piece of technology that threatens to break under the burden of high-speed, complex designs.

DSP World is an opportunity to get a firsthand look at the DSP cores, support circuitry, platforms, development tools, simulators, and hardware design language-based design aids that address such issues.