CPUs in FPGAs: many faces to a trend

Whether as synthesizable soft cores or hard cores on the die, CPUs are showing up in more FPGA designs, bringing with them important challenges for designers.

Ron Wilson, Editorial Director -- EDN, March 3, 2011

CPU cores in FPGAs have a history reaching back to the early years of the FPGA’s existence and a future extending far into the realms of microcontrollers and ASSPs (application-specific standard products). We are now at an inflection point in that trajectory, facing manifold options. CPU cores may be soft—synthesizable cores that go into the FPGA’s programmable logic—or hard—cell-based blocks that the FPGA vendor builds directly onto the die. The CPU architecture may be industry-standard, proprietary to the FPGA vendor, or unique. Processing capability spans tiny 8-bit microcontroller cores and 32-bit CPU clusters with DSP extensions. All this diversity conceals profound differences in implementation flow, in system performance, and in debugging access, all of which demand exploration.

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