Co-Design for SOCs -> 'Ramping-up' for complex multiprocessing applications
'Ramping-up' for complex multiprocessing applications
By Bernard Cole, EE Times
June 15, 1999 (11:46 a.m. EST)
URL: http://www.eetimes.com/story/OEG19990615S0012
In a move outside of its traditional realm of the embedded board-level computer market, General Microsystems Inc.(Rancho Cucamonga, Calif. ) has developed a software package that extends the capabilities of embedded real-time systems. Run-time versions of the software package-known as real-time asymmetric multiprocessing (Ramp)-will be made available royalty-free. Making use of what the company calls "barely coupled multiprocessing," Ramp uses an API and microkernel that makes it easy to distribute programs across multiple CPUs on the same board, said Ben Sharfi, company president. The API and microkernel are also free of charge. Adaptability benefits Currently available for use on Pentium-based systems running under the VxWorks RTOS from Wind River, Sharfi noted that the software can be adapted to other microprocessors and RTOSes as well. According to the company, the Ramp API is RTOS-independent and provid es calls for uploading, downloading, starting and stopping tasks, allocating memory and processor resources, establishing protected memory regions and facilitating communications between tasks. The Ramp microkernel, which occupies less than 10 kbytes of memory, is optimized for high-speed context switching and interrupt response, usually no more than 200 to 300 ns. Capable of supporting up to eight tasks simultaneously, the microkernel also incorporates an integrated debug monitor that allows tasks running on multiple processors to be debugged concurrently. Sharfi said that a single-processor programming model in Ramp allows for complex multiprocessing applications and programs to operate out of the same memory and use a common set of interprocessor and interrupt communications protocols and pathways. The master processor, which runs a full-featured RTOS like VxWorks, executes the main applications, while the Ramp microkernel and API distribute tasks and resources to slave processors and coordinate t heir activity. Ramp will be available for general use in August, at which time the cost for development licenses for the software will be released.
Related Articles
- Co-Design for SOCs -> Software debug shifts to forefront of design cycle
- Co-Design for SOCs -> Designers face chip-level squeeze
- Co-Design for SOCs -> Blend of tools needed for verification
- Co-Design for SOCs -> Embedded SOC takes new codesign tricks
- Co-Design for SOCs -> Iterated co-design right for system ICs
New Articles
Most Popular
- Streamlining SoC Design with IDS-Integrate™
- System Verilog Assertions Simplified
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)
- PCIe error logging and handling on a typical SoC
E-mail This Article | Printer-Friendly Page |