English
DSPs with PCI Express interface extend connectivity while improving performance and power efficiency
Krishna Mallampati, PLX Technology
EETimes (4/25/2011 12:50 PM EDT)
PCI Express (PCIe) has successfully penetrated business-focused market segments -- graphics, storage, servers, communications, and embedded systems – helped immensely by the ubiquity of PCIe interfaces on everything from high-end CPUs from Intel; GPUs from nVidia: embedded processors from Freescale, AMCC, and Cavium; and consumer products from Atheros, Marvell, Broadcom, Infineon, and Conexant.
Wi-Fi modules, set-top boxes, cable modems and home gateways now feature PCIe, and both the volume and number of product types are growing by leaps and bounds. This has helped to drive the presence of PCIe in all market segments ranging from graphics, servers, storage, communications and consumer products, to improve the ecosystem and to lower costs for customers, making it a win-win for all involved.
What has not been well known but has emerged recently is the presence of the PCIe interface on DSPs from Texas Instruments, Freescale, and LSI. In the past DSPs had either proprietary interfaces or Serial RapidIO (sRIO), but now DSPs have PCIe interface as well, offering designers more options for connectivity, and at lower price. This is especially important given the penetration of PCIe into rapidly evolving product categories, such as wireless base stations, video surveillance systems, video communications, medical and biological imaging, home A/V equipment, and digital video recorder/network video (DVR/NVR) boxes – all markets that continue to be bastions of DSPs.
This article will look at this development with examples of usage models and how it benefits the DSP makers, designers and end users - the entire ecosystem. This article will also look at the options designers have in PCIe interconnect and help them maximize both performance and power efficiency of DSP designs. Additionally, it will illustrate how that efficiency is achieved by taking advantage of PCIe switches’ flexible ports and lanes, small packages and unique ability to fan out to a number of endpoints.
|
E-mail This Article | 
|
|
Printer-Friendly Page |
|
||||||
Related Articles
- High-Performance DSPs -> AltiVec power: PCI buses fall short
- Reducing Power Consumption while increasing SoC Performance
- Optimizing High Performance CPUs, GPUs and DSPs? Use logic and memory IP - Part II
- Using an interface wrapper module to simplify implementing PCIe on FPGAs
- Built-In DMA Engines Unleash Power of PCI Express Switches
New Articles
- Quantum Readiness Considerations for Suppliers and Manufacturers
- A Rad Hard ASIC Design Approach: Triple Modular Redundancy (TMR)
- Early Interactive Short Isolation for Faster SoC Verification
- The Ideal Crypto Coprocessor with Root of Trust to Support Customer Complete Full Chip Evaluation: PUFcc gained SESIP and PSA Certified™ Level 3 RoT Component Certification
- Advanced Packaging and Chiplets Can Be for Everyone
Most Popular
- System Verilog Assertions Simplified
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- UPF Constraint coding for SoC - A Case Study
- Dynamic Memory Allocation and Fragmentation in C and C++
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)