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ICE-IP-338 High-speed XTS-GCM Multi Stream Inline Cipher Engine
HW/SW co-verification basics: Part 3 - Hardware-centric methods
Jason Andrews
EETimes (5/24/2011 1:43 PM EDT)
As we have seen in Part 1 and Part 2, there are benefits and drawbacks of using software models of microprocessors and other hardware. This section discusses techniques that avoid model creation issues by using a representation of the microprocessor that doesn't depend on an engineer coding a model of its behavior.
As the world of SoC design has evolved, the design flows used for microprocessor and DSP IP have changed. In the beginning, most IP for critical blocks such as the embedded microprocessor were in the form of hard IP. The company creating the IP wanted to make sure the user realized the maximum benefit in terms of optimized performance and area. The hard macro also allows the IP to be used without revealing all of the source code of the design. As an example, most of the ARM7TDMI designs use a hard macro licensed from ARM.
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