Basics of SoC I/O design: Part 2 - Hot swap & other implementation issues
Kannan Sadasivam and Sachin Gupta
EETimes (6/14/2011 11:04 PM EDT)
Having dealt in Part 1 with some of the basics of SoC I/O pin assignment, in this second part we will deal with a variety of implementation issues, including hot swap, threshold voltages, interrupts, pin assignments and Interfacing with the devices being operated at voltage other than SoC’s core voltage
E-mail This Article | Printer-Friendly Page |
|
Related Articles
- Basics of SoC I/O design: Part 1 - The building blocks
- Designing with ARM Cortex-M based System-On-Chips (SoCs) - Part I: The basics
- Design planning for large SoC implementation at 40nm - Part 2
- Specifying a PLL Part 2: Jitter Basics
- Internal JTAG - A cutting-edge solution for embedded instrument testing in SoC: Part 2