Who's managing your power management?
Bob Frostholm, JVD Inc.
EETimes (2/4/2013 3:26 PM EST)
Today’s complex systems employ a wide variety of semiconductor technologies. From the deepest sub-nanometer processors to the analog I/O, it’s easy to see the need for power management devices for multiple voltages – 1.0V, 1.2V, 1.5V, 1.8V, 2.2V, 2.5V, 2.8V, 3.0V, 3.3V and more – all in the same box.
Dozens of companies offer thousands of chips to address these needs. Data sheets, PDKs and application notes make implementation easier than ever. If your volume is high enough, chip company application engineers are more than willing to do the design work for you. Sit back, watch YouTube, follow friends on Facebook and wait for the circuit to arrive by email. It’s not quite that simple, but let’s be honest, there are a lot of free resources out there to assist.
A few dozen years ago, engineers fresh out of school were assigned to the power supply team; the most boring and least challenging aspect of the system and the one most forgiving of inexperience. Could it come to that again?
Not likely. But you really should ask yourself, who is really managing your power management. Is it you or your suppliers? Who really understands your power management needs and more importantly, the solution you’ve implemented? Is your 7Amp 1.2V solution overkill for your 2.9Amp requirement? Could a lower cost LDO be used instead of that switcher?
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
|
Related Articles
New Articles
- Why RISC-V is a viable option for safety-critical applications
- Dimensioning in 3D space: Object Volumetric Measurement by Leveraging Depth Camera-based Reconstruction on NVIDIA Edge devices
- What is JESD204B? Quick summary of the standard
- Post-Quantum Cryptography - Securing Semiconductors in a Post-Quantum World
- Analysis and Summary on Clock Generator Circuits and PLL Design
Most Popular
- System Verilog Assertions Simplified
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Method for Booting ARM Based Multi-Core SoCs
- An Outline of the Semiconductor Chip Design Flow