Secure-IC's Securyzr™ High-performance AES-XTS accelerator - optional SCA protection
Creating highly reliable FPGA designs
Angela Sutton, Synopsys
EETimes (6/13/2013 12:04 PM EDT)
Radiation-induced soft errors – "glitches" – became widely known in the 1970s with the introduction of dynamic RAM chips. The problem emerged as a result of radioactive contaminants in chip packaging, which emit alpha particles as they decay and subsequently disturb electrons in the semiconductor. This disturbance can result in an unwelcome change in voltage levels in digital logic.
In combinational logic, the voltage disturbance will most likely be transient; an unwanted transient signal is known as a single event transient (SET). However, synchronous logic – such as state machines, registers and memory – can store and propagate the transient error, which is likely to result in hardware failure. Such a stored error is known as a single event upset (SEU).
As far back as 1996, researchers at IBM estimated that each 256MB of RAM suffers one error per month as a result of soft errors. The error rate grows as logic densities increase, switching voltage levels decrease and switching speeds rise. Today's bigger, faster FPGAs will suffer from higher soft-error rates.
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