English
Safety & security architecture for automotive ICs
Yash Saini & Arun Jain (Freescale Semiconductors)
EDN (September 25, 2013)
The automotive industry is changing rapidly to address the stringent requirements for safety and security of vehicular systems. Requirements are not only coming from customers, but regulatory authorities are also pressuring for greater safety and security in vehicles. The requirements include high bandwidth networks, improved data security, enhanced functional safety, and reduced energy consumption.
The ISO 26262 standard defines functional safety for automotive equipment applicable throughout the lifecycle of all automotive electronic and electrical safety-related systems. The standard is an adaptation of the Functional Safety standard IEC 61508 for Automotive Electric/Electronic Systems.
Automotive systems need to be protected against any real-time defects to make it safe for use. Real-time defects can include internal and external errors (e.g., the vehicular communication network).
Automotive data security ranges from vehicle theft protection to enabling secure communication with external devices such as smart phones, MP3 players, or navigation devices. Security also means protection against hackers. After gaining access, a hacker could control everything from the entertainment system to braking.
|
E-mail This Article | 
|
|
Printer-Friendly Page |
|
||||||
Related Articles
- The Challenge of Automotive Hardware Security Deployment
- IPs for automotive application - Functional Safety and Reliability
- Authentication Flash: Closing the Security Gap Left by Conventional NOR Flash ICs
- Designing for safety and security in a connected system
- The Functional Safety Imperative in Automotive Design
New Articles
- Quantum Readiness Considerations for Suppliers and Manufacturers
- A Rad Hard ASIC Design Approach: Triple Modular Redundancy (TMR)
- Early Interactive Short Isolation for Faster SoC Verification
- The Ideal Crypto Coprocessor with Root of Trust to Support Customer Complete Full Chip Evaluation: PUFcc gained SESIP and PSA Certified™ Level 3 RoT Component Certification
- Advanced Packaging and Chiplets Can Be for Everyone
Most Popular
- System Verilog Assertions Simplified
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- UPF Constraint coding for SoC - A Case Study
- Dynamic Memory Allocation and Fragmentation in C and C++
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)