Automotive System & Software Development Challenges - Part 2
Frank Schirrmeister, Cadence Design Systems
EDN (November 12, 2013)
Part 1 of this article discussed automotive design chains and their dynamics, as well as software and networking challenges in automotive. We closed with a discussion of the different development engines for chip and system design – virtual prototyping, RTL simulation, acceleration/emulation and FPGA based prototyping.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
|
Cadence Hot IP
Related Articles
- Automotive System & Software Development Challenges - Part 1
- Dealing with automotive software complexity with virtual prototyping - Part 2: An AUTOSAR use case
- Dealing with automotive software complexity with virtual prototyping - Part 1: Virtual HIL development basics
- DSP system design, part 2: Critical design choices
- Embedded DSP Software Design Using Multicore a System-on-a-Chip (SoC) Architecture: Part 2
New Articles
- Why RISC-V is a viable option for safety-critical applications
- Dimensioning in 3D space: Object Volumetric Measurement by Leveraging Depth Camera-based Reconstruction on NVIDIA Edge devices
- What is JESD204B? Quick summary of the standard
- Post-Quantum Cryptography - Securing Semiconductors in a Post-Quantum World
- Analysis and Summary on Clock Generator Circuits and PLL Design
Most Popular
- System Verilog Assertions Simplified
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Method for Booting ARM Based Multi-Core SoCs
- An Outline of the Semiconductor Chip Design Flow