Automotive System & Software Development Challenges - Part 2
Frank Schirrmeister, Cadence Design Systems
EDN (November 12, 2013)
Part 1 of this article discussed automotive design chains and their dynamics, as well as software and networking challenges in automotive. We closed with a discussion of the different development engines for chip and system design – virtual prototyping, RTL simulation, acceleration/emulation and FPGA based prototyping.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
|
Cadence Hot IP
Related Articles
- Automotive System & Software Development Challenges - Part 1
- Dealing with automotive software complexity with virtual prototyping - Part 2: An AUTOSAR use case
- Dealing with automotive software complexity with virtual prototyping - Part 1: Virtual HIL development basics
- DSP system design, part 2: Critical design choices
- Embedded DSP Software Design Using Multicore a System-on-a-Chip (SoC) Architecture: Part 2
New Articles
- Discover new Tessent UltraSight-V from Siemens EDA, and accelerate your RISC-V development.
- The Critical Factors of a High-performance Audio Codec - What Chip Designers Need to Know
- Density Management in Analog Layout Design: Addressing Issues and Ensuring Consistency
- Nexus: A Lightweight and Scalable Multi-Agent Framework for Complex Tasks Automation
- How the Ability to Manage Register Specifications Helps You Create More Competitive Products
Most Popular
- System Verilog Assertions Simplified
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Synthesis Methodology & Netlist Qualification
- Discover new Tessent UltraSight-V from Siemens EDA, and accelerate your RISC-V development.
- Understanding Logic Equivalence Check (LEC) Flow and Its Challenges and Proposed Solution