English
The Embedded SoC
by Jan Rabaey
Attendees at this year's DAC should pay particular attention to the changing nature of embedded systems as they become more interchangeable, and more closely identified, with multifunction SoCs.
Embedded system SoCs raise the level of complexity in high-density ICs with their programmable and mixed-signal natures. Like their board-based cousins, they also have to interact with the "real world" and are extremely cost sensitive.
When embedded systems were board based, it was fairly straightforward to select the proper components, integrate them with software, and ship the product. Creating such an amalgam on chip is quite a different matter, and even the smallest mistakes can quickly turn into multimillion-dollar headaches given the complexity and cost associated with repairing or respinning silicon.
In broad terms, these "costs" can be defined as 1) Manufacturing, meaning the production cost based on complexity; 2) NREs, or the necessary retooling for a new methodology or production model; and 3) Design Costs, the price of talent and what it takes to manage the physical effects associated with ultra-DSM IC creation.
Attendees at this year's DAC should pay particular attention to the changing nature of embedded systems as they become more interchangeable, and more closely identified, with multifunction SoCs.
Embedded system SoCs raise the level of complexity in high-density ICs with their programmable and mixed-signal natures. Like their board-based cousins, they also have to interact with the "real world" and are extremely cost sensitive.
When embedded systems were board based, it was fairly straightforward to select the proper components, integrate them with software, and ship the product. Creating such an amalgam on chip is quite a different matter, and even the smallest mistakes can quickly turn into multimillion-dollar headaches given the complexity and cost associated with repairing or respinning silicon.
In broad terms, these "costs" can be defined as 1) Manufacturing, meaning the production cost based on complexity; 2) NREs, or the necessary retooling for a new methodology or production model; and 3) Design Costs, the price of talent and what it takes to manage the physical effects associated with ultra-DSM IC creation.
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