NVM OTP NeoBit in Vanguard (350nm, 250nm, 180nm, 160nm, 150nm, 110nm)
Smaller scale chip design relies on creative thinking and collaborative workflow
Frederic Hayem, Nextivity Inc
EDN (March 01, 2014)
Chip design can be a complex and time consuming endeavor that demands accuracy and speed. While larger enterprises have the wherewithal to invest in sophisticated EDA (electronic design automation) tools for development and verification, smaller research facilities within rapidly growing tech companies have to rely on a disciplined, integrated team approach to development.
Cel-Fi smart signal booster
Cel-Fi is a smart signal booster designed to eliminate in-building dead zones and improve indoor mobile phone reception for 3G and 4G voice and data. Cel-Fi can create a large coverage bubble which automatically adjusts to the size of the indoor environment served, making it ideal for multi-level homes and medium sized businesses.
Cel-Fi consists of two wireless devices, a Network Unit (box on the right in the picture below) and Coverage Unit (box on the left in the picture below) that work together to increase 3G and 4G mobile broadband connectivity throughout the building. The Network Unit receives the signal from the mobile phone network (even if only 1 bar of signal is available) and relays it to the Coverage Unit, which cleans it, converts it and amplifies it. The Cel-Fi system is radically different from a traditional repeater, as it was designed to provide maximum coverage, be network friendly and easily installed by the end user.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
Related Articles
- How control electronics can help scale quantum computers
- Design workflow management enhances SoC design quality and efficiency
- Multisite, collaborative hardware design calls for HCM
- Viewpoint: Competitive Advantage vs. Collaborative Advantage
- Collaborative Engineering Approach Towards IP-Based SoC Design
New Articles
- How NoC architecture solves MCU design challenges
- Automating Hardware-Software Consistency in Complex SoCs
- Beyond Limits: Unleashing the 10.7 Gbps LPDDR5X Subsystem
- How to Design Secure SoCs: Essential Security Features for Digital Designers
- System level on-chip monitoring and analytics with Tessent Embedded Analytics