English
Process Detector (For DVFS and monitoring process variation)
Implementing Floating-Point Algorithms in Real Hardware: Remember the Adaptation Step
Ron Wilson, Altera Corporation
May 30, 2014
As more applications become more compute-intensive, a seeming detail—the way the application represents numbers internally—can make or break a project. This is no news for experienced digital signal processing (DSP) engineers—they live with this concern every day. But many applications outside the traditional scope of DSP—such as machine control, video, and sensor processing in mobile devices—are relying more on number-crunching, and are taking on the same design flow that has characterized the heavyweight DSP designs. In this flow, algorithm development starts out in C, Java, or a domain-specific language such as MATLAB, each of which uses IEEE 754 compliant floating-point arithmetic. The algorithm gets passed to a hardware design team (Figure 1). Then it is the design team’s job to implement the algorithm on hardware that will meet system design constraints—whether that hardware supports IEEE 754 or not. It is vital that design managers understand the tasks—and the risks—in this implementation process.
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