English
Design trade-offs for product development
Dunstan Power, ByteSnap
embedded.com (September 22, 2014)
ByteSnap is in the business of designing new products for customers, and one of the pleasures of the job is hearing about interesting new ideas that customers have and trying to work out a good route to market for them. Once the project has been discussed, the conversation often follows this course: “I know it is hard for you to say, and I won’t hold you to it, but how much do you think it will cost, and how long will it take?”
This is an understandable question; often the customer is trying to establish whether something is actually financially viable. Without a spec, only a rough idea can be given, and there are always lots of decisions to make in the design process. That is why electronics is an art. Give the same specification to ten engineers and you will get ten, possibly wildly different, designs, all of which may meet the specification perfectly. However, one of those designs will win in terms of unit cost and another (probably not the same one) will win on development cost. A third may have the best technical specification, though providing they all meet the original spec, do these enhancements matter?
This article seeks to explore some of the key trade-offs made when designing a product, with reference to the software and electronic design aspects. It focuses primarily on the commercial and time implications of these decisions.
|
E-mail This Article | 
|
|
Printer-Friendly Page |
Related Articles
- Design trade-offs of using SAR and Sigma Delta Converters for Multiplexed Data Acquisition Systems
- Trade-offs in high-performance comms
- Microcontroller Applications -> Net-linking MCUs requires trade-offs
- MPEG Standards -> How MPEG-4 trade-offs affect design
- Simulating Trade-offs in W-CDMA/EDGE Receiver Front Ends
New Articles
- Why RISC-V is a viable option for safety-critical applications
- Dimensioning in 3D space: Object Volumetric Measurement by Leveraging Depth Camera-based Reconstruction on NVIDIA Edge devices
- What is JESD204B? Quick summary of the standard
- Post-Quantum Cryptography - Securing Semiconductors in a Post-Quantum World
- Analysis and Summary on Clock Generator Circuits and PLL Design
Most Popular
- System Verilog Assertions Simplified
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Method for Booting ARM Based Multi-Core SoCs
- An Outline of the Semiconductor Chip Design Flow