NVM OTP NeoBit in Maxchip (180nm, 160nm, 150nm, 110nm, 90nm, 80nm)
System Management Controllers
By Ron Wilson, Editor-in-Chief, Altera Corporation
No other area of modern system design seems as perplexing as the apparently trivial subject of system management controllers—or chassis management, or shelf management, or board management, or any of a half-dozen other terms. The trouble begins with that old demon of design, feature creep.
“When I was first involved in this area,” recalls Hewlett Packard senior director of Moonshot Platform engineering Gerald Kleyn, “we controlled a fan with a thermistor and called it system management. Today, you can think of system management as the control plane sitting above the hardware handling the workload in a large system.”
“It has become a lot more than measuring voltages and temperatures and controlling fans,” asserts Pigeon Point Systems president Rich Vasse. “Some of these ‘controllers’ are running Linux, interacting with payloads, and collecting data for big-data analysis.” For further reading: Read a white paper on the use of FPGAs in system management. Explore the genuine complexity of advanced battery management.
This range of concepts helps explain the perplexity. Think of system management as a tangle of independently-developed point solutions and industry-specific standards. Now imagine a host of powerful system requirements—physical monitoring and control, remote configuration management, workload management, virtualization, reliability, and security—each grabbing a loose end of rope and pulling—hard. That is how we make a simple thermistor circuit into a microcontroller, an embedded Linux system, and eventually, a Gordian knot.
|
Intel FPGA Hot IP
Related Articles
- Designing an Effective Traffic Management System Through Vehicle Classification and Counting Techniques
- Power Management for Internet of Things (IoT) System on a Chip (SoC) Development
- Implementing a Design Management System
- Single core to multicore: Addressing the system design paradigm shift with project management and software instrumentation
- DRAM Controllers for System Designers
New Articles
- Quantum Readiness Considerations for Suppliers and Manufacturers
- A Rad Hard ASIC Design Approach: Triple Modular Redundancy (TMR)
- Early Interactive Short Isolation for Faster SoC Verification
- The Ideal Crypto Coprocessor with Root of Trust to Support Customer Complete Full Chip Evaluation: PUFcc gained SESIP and PSA Certified™ Level 3 RoT Component Certification
- Advanced Packaging and Chiplets Can Be for Everyone
Most Popular
- System Verilog Assertions Simplified
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- UPF Constraint coding for SoC - A Case Study
- Dynamic Memory Allocation and Fragmentation in C and C++
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)
E-mail This Article | Printer-Friendly Page |