English
FinFET impact on dynamic power
Arvind Narayanan, Mentor Graphics
EDN (March 11, 2015)
FinFET transistors are now in production at the major foundries, having gone from drawing board to products on the shelf in record time. FinFET adoption has been growing steadily because they deliver better power, performance, and area compared to their planar counterparts. This makes them very compelling for smartphones, tablets, and other products that require long battery life and snappy performance. Figure 1 shows the advantages in speed, power usage, and density of TSMC’s 16nm FinFET process over two other processes.
|
E-mail This Article | 
|
|
Printer-Friendly Page |
|
||||||
Related Articles
- A need for static and dynamic Low Power Verification
- How to manage dynamic power in a microcontroller using its non-maskable interrupt
- Employ dynamic power reduction in an ASIC
- Pulse-latch approach reduces dynamic power
- Using dynamic run-time scheduling to improve the price-performance-power efficiency of heterogeneous multicore SoCs
New Articles
- Beyond Limits: Unleashing the 10.7 Gbps LPDDR5X Subsystem
- How to Design Secure SoCs: Essential Security Features for Digital Designers
- System level on-chip monitoring and analytics with Tessent Embedded Analytics
- What tamper detection IP brings to SoC designs
- RISC-V in 2025: Progress, Challenges,and What's Next for Automotive & OpenHardware
Most Popular
- System Verilog Assertions Simplified
- Beyond Limits: Unleashing the 10.7 Gbps LPDDR5X Subsystem
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Design Rule Checks (DRC) - A Practical View for 28nm Technology
- How to Design Secure SoCs: Essential Security Features for Digital Designers