Anatomy of the HDMI IP Certification Flow

Dr. Antonio J. Salazar E., Hugo Faria (Synopsys)
Quintin D. Anderson (Granite River Labs)

Overview

Today, consumers expect to have the most advanced display and audio features in their multimedia devices like tablet, set-top-box or digital TV. To meet such expectations, product developers must allow their devices to transmit high-definition (HD) data through the High-Definition Multimedia Interface (HDMI). HDMI IP plays a critical role in enabling HDMI 2.0 features, making 60 frames per second UHD video and audio possible in multimedia system-on-chips (SoCs).

As products proliferate and standards like HDMI continually evolve, SoC designers can avoid costly functionality and interoperability issues by selecting and integrating HDMI IP that has gone through an extensive multi-phase testing process and achieved certification.

This white paper outlines the HDMI IP certification flow from internal quality, functionality and interoperability testing to certification of the latest HDMI Compliance Test Specification (CTS) at an Authorized Test Center (ATC).

Figure 1: HDMI ecosystem

Avoiding Design Delays and Costly Re-Spins

Multimedia product developers aim to be first to market, which makes time-to-market a critical factor for SoC designers when selecting HDMI IP from an IP provider. The challenge lies in the IP selection process: SoC designers need assurance of the product’s robustness, interoperability and performance. Designers must receive favorable answers to the following questions, or face the risk of design delays and costly re-spins.

1. Can the IP provider present detailed internal test data demonstrating compliance to the latest HDMI CTS – in silicon and with margin relative to the specification requirement? Do these data demonstrate robust performance across an appropriate range of silicon process, voltage, and temperature (PVT) conditions?
2. Has the end-to-end (receiver and transmitter) IP solution gone through functionality and interoperability testing by the IP provider?
3. In addition to internal interoperability testing, has the IP provider participated in industry interoperability test events?
4. In addition to internal testing, has the IP achieved certification at an ATC and met the requirements of the latest HDMI CTS?

The certification flow consists of multiple phases and participants (Figure 1). However this paper only focuses on the steps conducted by an IP provider and ATC. Whether testing internally or at an ATC, HDMI IP providers and ATCs must be familiar with the latest compliance test specification that accompanies every new HDMI specification release. This process includes using state-of-the-art test equipment with integrated test automation, as well as proven and approved methodologies that conform to the latest CTS.

Internal Certification Flow

The internal certification flow includes several stages of debugging and testing at different levels of abstraction such as simulation, prototyping and verification, and constant feedback by the involved engineering teams. This model ensures quality and robustness of the final product (Figure 2). To accelerate feature validation and interoperability testing, an IP prototyping platform like Synopsys’ DesignWare IP Prototyping Kit is utilized to streamline the handoff to the ATC for HDMI certification under the latest CTS.

Figure 2: Synopsys internal functionality and interoperability test process

Hardware validation is achieved by promptly setting the targeted test sequence and connecting to test equipment with the latest compliance requirements. The fast iteration cycle provided by the DesignWare IP Prototyping Kit allows for quick changes in design configuration or debugging to isolate a particular issue in timing or a feature. Software drivers and elements can be directly tested providing a flexibility that is seldom found in traditional hardware validation setups. Once all the targeted features and timing aspects have been achieved, an internal compliance analysis is conducted by another team, outside of the prototyping team. This is done for obtaining additional perspective and to ensure impartiality of the test procedures and results analysis. The device, along with a Capabilities Declaration Form (CDF), is then handed off to the ATC. The CDF contains information regarding the device features and capabilities. The HDMI compliance program is feature-driven, so generally the ATC will need to test all declared features and capabilities under the latest CTS as long as an accepted methodology exists.

Before the handoff and during the internal certification flow, the HDMI IP is also tested for interoperability. Extensive functional interoperability testing provides a critical check that a product will deliver the expected user experience in today’s connected world where the volume of devices continually increases. Products should test against various other HDMI products across relevant use cases and targeted applications (sources, sinks, hubs, adapters, repeaters, etc.), achieving broad coverage across both system OEMs and device chipsets. HDMI IP providers and product developers can also attend international HDMI “plugfest” events where HDMI adopters gather to test interoperability with one another’s products in a private setting; these events can provide a good way to achieve broad interoperability test coverage and valuable test data – often with pre-release products – in a short period of time.

Testing to Requirements of the Latest HDMI Compliance Test Specification

The verified system along with all the relevant documentation are then packaged together and prepared for the next phase of the certification flow, conducted by an HDMI ATC. With the IP integrated into an actual system-level design, the ATC tests to the requirements of the latest HDMI compliance test specification. Successful compliance testing at an ATC provides a valuable indication that the IP conforms to the specification and requirements established by the HDMI Forum and HDMI Licensing, LLC.

Testing to the requirements of the latest HDMI CTS provides a basic level of assurance and an important baseline indication that the design meets the HDMI specification. Many SoC designers and multimedia product developers choose to test “beyond compliance” at all stages of the design cycle to help ensure robust performance under real-world operating conditions. For example, IP and SoC designers need to electrically characterize the HDMI electrical interface to ensure robust performance over various silicon process, voltage and temperature (PVT) conditions with optimized PHY settings. Multimedia system developers need to evaluate performance under stressful environmental conditions including temperature, power supply, humidity, etc.

HDMI IP providers and product developers need to stay informed about the latest compliance test requirements and tests availability. As with virtually any standard, official test specifications, methodologies, and tools typically lag the specification, often by several months, presenting a dilemma to developers looking to quickly release products that incorporate new HDMI standards and features. New HDMI specifications also require updated test tools. For example, HDMI 2.0 source testing requires a 13 GHz scope vs. 8 GHz for HDMI 1.x, as well as new fixtures and test automation. Test methodologies evolve, and an HDMI product developer cannot assume that the new HDMI specification is tested in the same manner as the prior one. For example, HDMI 2.0 source testing changed fundamentally from HDMI 1.x with different compliance points and the application of a reference equalization model. The compliance testing requirements for a particular HDMI device depend largely on its supported features. Since many HDMI features are optional (including HDMI 2.0), HDMI product developers can avoid unnecessary testing time and cost by carefully choosing what features to support in the first place.

Conclusion

To ensure high quality and robustness, in their HDMI IP selection process, multimedia SoC designers must consider many factors, including features, functionality, performance and interoperability. It is critical for SoC designers to integrate a proven IP that has gone through rigorous internal and external quality control processes. The IP provider assures interoperability with other HDMI devices and tests the IP to the requirements of the latest HDMI compliance test specification through an internal interoperability testing and an external authorized test center certification.

Although certification is an important aspect, it is the quality control process itself that assures the final product’s robustness in the ecosystem. Multimedia SoC designers, looking to integrate third-party IP into their SoC, must make sure the IP has gone through an extensive interoperability testing by the IP provider and is certified to the latest HDMI CTS at an authorized test center. With careful planning and execution, a thorough quality assurance methodology can avoid costly re-spins, delays, and field issues.

Additional Resources

• DesignWare HDMI IP
• DesignWare IP Prototyping Kits for HDMI 2.0

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