FPGAs solve challenges at the core of IoT implementation
Helmut Demel, Lattice Semiconductor Corporation
EDN (July 04, 2016)
The Internet of Things (IoT) has become a wildly popular term these days, often used to describe a world in which virtually every electronic device connects to the Internet and each other. It comprises a staggering list of applications—everything from smart consumer appliances and vehicles to wearables—and that list will only grow as mobility continues to explode. But this growth brings with it implementation challenges to which solutions need to be found.
Smart, connected devices, and the IoT ecosystem they are helping to create, promise to transform everyday life. For individual consumers that might mean making devices more efficient and cost effective for their daily tasks, keeping them safer, or even helping ensure they live healthier lives. For businesses, the IoT promises significant advantages in terms of automation, energy efficiency, asset tracking and inventory control, shipping and location, security, individual tracking, and energy conservation.
But to reach the tens of billions of devices projected to make up the IoT, designers will have to overcome significant implementation challenges. Some of the key among them will be making IoT devices power efficient, handling incompatible interfaces, and providing a processing growth path to handle the inevitable increase in device performance requirements. An FPGA-based design approach can help address such challenges.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
|
Related Articles
- Using FPGAs to solve challenges in industrial applications
- How PUF-based RoT Can Solve IoT Security Issues
- Opportunities and Challenges for Near-Threshold Technology in End-Point SoCs for the Internet of Things
- Addressing Three Critical Challenges of USB Type-C Implementation
- Implementing analog functions in rugged, rad-hard FPGAs
New Articles
- Why RISC-V is a viable option for safety-critical applications
- Dimensioning in 3D space: Object Volumetric Measurement by Leveraging Depth Camera-based Reconstruction on NVIDIA Edge devices
- What is JESD204B? Quick summary of the standard
- Post-Quantum Cryptography - Securing Semiconductors in a Post-Quantum World
- Analysis and Summary on Clock Generator Circuits and PLL Design
Most Popular
- System Verilog Assertions Simplified
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Method for Booting ARM Based Multi-Core SoCs
- An Outline of the Semiconductor Chip Design Flow