NVM OTP NeoBit in Maxchip (180nm, 160nm, 150nm, 110nm, 90nm, 80nm)
Functional Safety and the FPGA World
Joe Mallett, Synopsys
EETimes (10/24/2016 04:40 PM EDT)
Autonomous driving is just one application example where functionally safe designs are required.
There are several trends in the industry when it comes to functional safety, along with multiple market segments utilizing the specification to help drive engineers to deliver highly reliable and safe applications to the market. In the automotive market, for example, the integration of key sub-systems into single-end devices found in the car like navigation and automated driver assistance systems (ADAS) is growing. There is a need for integrated functional safety due to the greater interaction between people, the car, and the environment. Autonomous driving is just one application example where functionally safe designs are required. FPGAs are a good fit for this application space due to their long lifetimes, high processing bandwidth, and flexibility to integrate many IP technologies.
The need for more processing creates a need for high-speed fabric and higher integration of the sub-systems into a single device, thereby pushing designs to larger devices. To facilitate building functionally safe designs, robust synthesis tools that support defined methods are needed.
E-mail This Article | Printer-Friendly Page |
|
Synopsys, Inc. Hot IP
Related Articles
New Articles
- Quantum Readiness Considerations for Suppliers and Manufacturers
- A Rad Hard ASIC Design Approach: Triple Modular Redundancy (TMR)
- Early Interactive Short Isolation for Faster SoC Verification
- The Ideal Crypto Coprocessor with Root of Trust to Support Customer Complete Full Chip Evaluation: PUFcc gained SESIP and PSA Certified™ Level 3 RoT Component Certification
- Advanced Packaging and Chiplets Can Be for Everyone
Most Popular
- System Verilog Assertions Simplified
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- UPF Constraint coding for SoC - A Case Study
- Dynamic Memory Allocation and Fragmentation in C and C++
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)