The Future of Microcontrollers
Tony Kozaczuk, Director Architecture Solutions, Flex Logix
EETimes (11/16/2017 00:01 AM EST)
Integration of eFPGA into microcontrollers is happening today now that this technology is available from multiple suppliers in 180nm to 16nm process nodes.
Microcontrollers today have an issue and an opportunity.
The issue is that at older process nodes, there are dozens of SKUs of microcontrollers with small variations in the type and number of serial I/Os and/or hardware accelerators. At 40nm, the mask costs start to rise substantially so doing dozens of variations is an expensive proposition.
The opportunity for microcontrollers is around the “glue” FPGA chips used by designers for decades. If these FPGA chips are integrated instead of being standalone, customers can significantly improve the cost, speed and power consumption of MCUs. This is a huge value proposition.
While not a new technology, embedded FPGA (eFPGA) is finally at the stage where it is ready to go mainstream with multiple suppliers, design wins in progress and proven silicon. Customers can leverage this technology in a number of ways, such as:
- A reconfigurable accelerator that can directly access on-chip buses, cache and I/O. One mask can cover multiple needs and customers can achieve higher performance.
- A reconfigurable I/O that can implement any serial I/O and can push low-level processing to the I/O block. This frees up the processor and improves responsiveness and battery life.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
|
Related Articles
- Microcontroller Applications -> Microcontrollers craft a networked future
- Revolutionizing AI Inference: Unveiling the Future of Neural Processing
- Role of Embedded Systems and its future in Industrial Automation
- The Future of Safe and Secure Aerospace Systems
- The Future of Embedded FPGAs - eFPGA: The Proof is in the Tape Out
New Articles
- Beyond Limits: Unleashing the 10.7 Gbps LPDDR5X Subsystem
- How to Design Secure SoCs: Essential Security Features for Digital Designers
- System level on-chip monitoring and analytics with Tessent Embedded Analytics
- What tamper detection IP brings to SoC designs
- RISC-V in 2025: Progress, Challenges,and What's Next for Automotive & OpenHardware
Most Popular
- System Verilog Assertions Simplified
- Beyond Limits: Unleashing the 10.7 Gbps LPDDR5X Subsystem
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Optimizing Analog Layouts: Techniques for Effective Layout Matching
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)