The evolution of embedded devices: Addressing complex design challenges
Phil Burr, Arm
embedded.com (September 18, 2018)
Embedded devices used to be relatively straightforward to design before the Internet of Things. The designer of an appliance, industrial controller or environmental sensor only needed to interface the input signals, process with a microcontroller and provide output control. Systems were standalone; and other than reverse engineering, there was no incentive for a hacker to access a system.
With the introduction of the smartphone, we now expect our devices to be smart, upgradable and accessible over the Internet. Security is not optional – if security is not taken seriously, data, brand reputation and revenue streams will all be affected. Also, embedded systems are becoming more complex and you can’t be an expert in everything! Fortunately, you can use existing standards and stack libraries to get a project completed in a timely, secure way.
This article outlines the key design challenges an embedded developer faces today, and some of the new technologies that will help designers address these challenges.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
|
Arm Ltd Hot IP
Related Articles
- Addressing the challenges of embedded analytics
- Verification challenges of embedded memory devices
- Bigger Chips, More IPs, and Mounting Challenges in Addressing the Growing Complexity of SoC Design
- Debugging complex RISC-V processors
- Integrating VESA DSC and MIPI DSI in a System-on-Chip (SoC): Addressing Design Challenges and Leveraging Arasan IP Portfolio
New Articles
- Why RISC-V is a viable option for safety-critical applications
- Dimensioning in 3D space: Object Volumetric Measurement by Leveraging Depth Camera-based Reconstruction on NVIDIA Edge devices
- What is JESD204B? Quick summary of the standard
- Post-Quantum Cryptography - Securing Semiconductors in a Post-Quantum World
- Analysis and Summary on Clock Generator Circuits and PLL Design
Most Popular
- System Verilog Assertions Simplified
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Method for Booting ARM Based Multi-Core SoCs
- An Outline of the Semiconductor Chip Design Flow