Software takes center stage to meet vital SoC goals
Software takes center stage to meet vital SoC goals
By Richard J. Tobias, Vice President, ASIC & Foundry Business Unit, System LSI Group, Toshiba America Electronic Components, Inc., Irvine, Calif., EE Times
January 13, 2003 (12:43 p.m. EST)
URL: http://www.eetimes.com/story/OEG20030110S0041
ASIC vendors are in the software business and not just as a nice sideline. After all, ASIC silicon exists only to run software, and the silicon functionality itself consists largely of software. As the emphasis on software skyrockets in the next few years, ASIC vendors who do not step up to this requirement will disappear. At the same time, vendors must take strong steps to simplify SoC design and do so in a way that improves their ability to supply more software. Rapid design and hardware/software integration will be the make-or-break issues in the coming years for ASIC vendors. How did software become such a critical part of the ASIC business? The same way it did in the board business 20 years ago and for similar reasons. As boards became more complex and centered on microprocessors or microcontrollers, selling a board without software became an absurd proposition. Both the box and board makers had to either supply softwar e and/or make sure that software was available from a third party. Even when relying on third-party software vendors, hardware makers had to at least provide BIOS-type code and device drivers. Today, no one would think of buying a board or system that was not supported with integrated software. The same transformation is now re-making the ASIC business. The term "system-on-a-chip" says it all. When it comes to software, these chips have to be treated just like boxes or boards. Even ASICs that do not qualify as full-blown SoCs almost always have an embedded processor. At the very least, they provide support functions for an external processor. At the end of the day, ASICs are all about running software. And until the software is integrated, the ASICs sit there with nothing to do. Given the length of time needed to integrate software with ASIC hardware today, the ASICs are sitting there far too long. The hardware/software integration cycle has to be shortened, and ASIC vendors have to take the responsi bility. In some ways, the relationship between hardware and software is closer for ASICs than it is for boxes and boards because ASIC hardware itself so often consists of more software than hardware. Consider an MPEG-4 decoder. It looks like silicon IP but is only one percent hardware based on the amount of work that goes into hardware design versus software development. A significant aspect of the MPEG-4 example is that not all of the associated software has to run within the MPEG-4 IP block. Some of the software handles control-layer tasks that are out of the real-time loop and can therefore run on a host CPU. Shifting software to a CPU has advantages for managing system-level features and may reduce the amount of hardware needed overall, but taking advantage of this strategy demands even more attention to hardware/software integration. Another good example of the hardware/software balance is a USB 2.0 interface. This type of interface used to be mostly hardware, but USB 2.0 requir es a full protocol stack. Compared to the RS-232-type design work on the hardware, the protocol stack requires a team twice as large and takes more time. The examples go on. As an ASIC vendor, we have to develop both the hardware and software, or we have nothing to sell. The software ranges from drivers and protocol stacks to DSP code and functional software modules that ASIC customers can integrate with their application code. Software efforts In keeping with the need for ASIC vendors to take a system-level approach to SoCs, the push to deliver more software must continue with the delivery of BIOS-type software and eventually operating systems. At the very least, ASIC vendors must work closely with the major RTOS suppliers and provide an abstraction layer that plugs into RTOSs. As a result of this trend, an ASIC vendor such as Toshiba will eventually have more software developers than hardware designers. This dramatic shift is well under way and mu st ramp-up rapidly over the next few years. An important consequence of this software-oriented trend is that ASIC designers must clearly understand that they are designing software platforms. More importantly, the ASIC design process must change to support the platform concept. The only efficient way to supply system-level software for ASICs is to work with common platform architectures that can be used across many designs. This change to a platform approach is also necessary to streamline the hardware design process. The ASIC industry has recognized for years that the only practical way to take advantage of the many millions of gates available in SoCs is to use and reuse IP blocks. But industry participants have been slow to accept the fact that most of the IP must be integrated and verified before a specific ASIC design gets under way. Otherwise, each ASIC design cycle takes far too long and carries far to great a risk of failure. A pre-integrated set of IP for a common family of applications is a hardware platform that serves as a software platform. Creating a viable platform is not just a matter of integrating a lot of hardware and software IP, however. Design-support software is also crucial. With the aid of a push-button tool flow, designers can customize an ASIC hardware/software platform as much as desired and in a short time frame. At the same time, it is important to bear in mind that deleting functionality from a properly designed platform generally has the least impact on the ASIC design and verification cycle, so the most complete platforms will prove to be the most valuable. Supported by a push-button tool flow, the platform approach allows rapid customization of SoC designs by leveraging commodity IP blocks, standardized buses, testbenches and high-level C simulation models. With these elements in place, the platform approach can reduce time to market for a customizable SoC to as little as 6 months. A single ASIC vendor is unlikely to be able to develo p all the hardware and software IP needed for all platforms, so IP partnerships will be crucial. Partnerships are especially important for specialized applications ranging from printers and storage to multimedia and networking. However, the ASIC vendor must take full responsibility for the relationship with third-party IP suppliers. ASIC customers must be able to rely on the IP as being ready to use, properly verified and best in class. A customizable platform-type design methodology is the only way to meet all of today's vital SoC goals: shorten hardware and software design/verification cycles, increase the software content, and speed up hardware/software integration.
Related Articles
New Articles
- Quantum Readiness Considerations for Suppliers and Manufacturers
- A Rad Hard ASIC Design Approach: Triple Modular Redundancy (TMR)
- Early Interactive Short Isolation for Faster SoC Verification
- The Ideal Crypto Coprocessor with Root of Trust to Support Customer Complete Full Chip Evaluation: PUFcc gained SESIP and PSA Certified™ Level 3 RoT Component Certification
- Advanced Packaging and Chiplets Can Be for Everyone
Most Popular
- System Verilog Assertions Simplified
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- UPF Constraint coding for SoC - A Case Study
- Dynamic Memory Allocation and Fragmentation in C and C++
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)
E-mail This Article | Printer-Friendly Page |